Walter Scott, Jr. College of Engineering

Graduate Exam Abstract

Yishai Statter
Ph.D. Final
May 06, 2016, 2:00 pm - 4:00 pm
Odyssey Design Studio Scott Building
Abstract: With ever increasing demand for lower power consumption, lower cost, and higher performance, designing analog circuits to meet design specifications has become an increasing challenging task, On one hand, analog circuit designers must have intimate knowledge about the underlining silicon process technology’s capability to achieve the desired specifications. On the other hand, they must understand the impact of tweaking circuits to satisfy a given specification on all circuit performance parameters. Analog designers have traditionally learned to tackle design problems with numerous circuit simulations using accurate circuit simulators such as SPICE, and have increasingly relied on trial-and-error approaches to reach a converging point. However, the increased complexity with each generation of silicon technology and high dimensionality of searching for solutions, even for some simple analog circuits, have made trial-and-error approaches extremely inefficient, causing long design cycles and often missed market opportunities.. Novel rapid and accurate circuit evaluation methods that are tightly integrated with circuit search and optimization methods are needed to aid design productivity.

Furthermore, the current design environment with fully distributed licensing and supporting structures is cumbersome at best to allow efficient and up-to-date support for design engineers. With increasing support and licensing costs, fewer and fewer design centers can afford it. Cloud-based software as a service (SaaS) model provides new opportunities for CAD applications. It enables immediate software delivery and update to customers at very low cost. SaaS tools benefit from fast feedback and sharing channels between users and developers and run on hardware resources tailored and provided for them by software vendors. However, web-based tools must perform in a very short turn-around schedule and be always responsive.

A new class of analog design tools is presented in this dissertation. The tools provide effective design aid to analog circuit designers with a dash-board control of many important circuit parameters. Fast and accurate circuit evaluations are achieved using a novel lookup-table transistor models (LUT) with novel built-in features tightly integrated with the search engine to achieve desired speed and accuracy. This enables circuit evaluation time several orders faster than SPICE simulations. The proposed architecture for analog design attempts to break the traditional analog design flow using SPICE based trial-and-error methods by providing designers with useful information about the effects of prior design decisions they have made and potential next steps they can take to meet specifications. Benefiting from the advantages offered by web-hosted architectures, the proposed architecture incorporates SaaS as its operating model. The application of the proposed architecture is illustrated by an analog circuit sizer and optimizer. The Γ (Gamma) sizer and optimizer show how web-based design-decision supporting tool can help analog circuit designers to reduce design time and achieve high quality circuit.
Adviser: Dr Tom Chen
Co-Adviser: N/A
Non-ECE Member: Dr Ross McConnell
Member 3: Dr George Collins
Addional Members: Dr Sudeep Pasricha
1) Statter, Yishai, and Tom Chen. "A novel high-throughput method for table look-up based analog design automation." Integration, the VLSI Journal 52 (2016): 168-181.

2) Statter, Yishai, and Tom Chen. "Γ (Gamma): A SaaS-Enabled Fast and Accurate Analog Design System." Integration, the VLSI Journal (2016).
Program of Study:
ECE 520 Optimization-Control & Comm
ECE 554 Computer Architecture
CS 514 Software Product/Process Eval
CS 520 Analysis of Algorithms
CS 658 Internet Engineering
ECE 501 Foundations of Systems Engr
ECE 534 Analog Integr Circuit Design
MATH 620 Variatnal Methds&Optimizatn I