Walter Scott, Jr. College of Engineering

Graduate Exam Abstract

Manjukumar Harthikote Matha
M.S. Final
Mar 23, 2007, 11:30 - 1:00
ACNS Conference Room 610, Univ Services
INTEGRATION OF REDUCTION OPERATORS IN A COMPILER FOR FPGAS
Abstract: The goal of the Cameron project is to provide a high-level programming language for writing image processing applications on reconfigurable hardware and to make the development a software based approach rather than a hardware approach. In this pursuit, the Cameron project has developed SA-C and SA-C* single assignment languages. This study enhances the run-time reduction operation capabilities of the SA-C* by introducing histogram and median filter nodes. This study implements the AHAHA level graph of both the nodes in the SA-C* compiler. The histogram is implemented in three different VHDL designs, and each design is aimed to achieve space and time efficient circuits. The median filter is implemented using the Stones shuffle network in SA-C* and is optimized at AHAHA level to achieve better execution time.
Adviser: Dr. Sanjay Rajopadhye
Co-Adviser: Dr. Wim Bohm
Non-ECE Member: Dr. Wim Bohm, Department of Computer Science
Member 3: Dr. H.J. Siegel, Department of Electrical and Computer Engineering
Addional Members:
Publications:
Program of Study: