Abstract: This dissertation presents a comprehensive study on Networks-on-Chip (NoCs), focusing on 3D and 2.5D topologies and interposer designs, and addresses the challenges of latency, energy efficiency, and fault tolerance. The research investigates the challenges and solutions for 3D NoCs, which utilize vertical die stacking with inter-layer Through-Silicon Via (TSV) links to achieve scalable and energy-efficient on-chip communication. To mitigate the low reliability and high fabrication costs of TSV technology, Partially Connected 3D NoCs (PC-3DNoCs) are proposed, which use fewer vertical TSV links. An adaptive congestion- and energy-aware elevator-selection algorithm called AdEle+ is also introduced to manage traffic load and congestion at elevators, resulting in reduced average latency, hardware overhead, and improved energy efficiency.

Furthermore, this dissertation presents the first deadlock-free and fault-tolerant routing algorithm called DeFT for 2.5D integrated chiplet systems. DeFT enhances redundancy in vertical-link selection, tolerates faults in vertical links while considering network congestion, and provides improved network reachability and reduced network latency compared to existing routing algorithms in 2.5D chiplet systems.

Moreover, a novel Reconfigurable power-efficient and congestion-aware Silicon-Photonic 2.5D Interposer network (ReSiPI) is proposed to address the high power consumption of interposer-based photonic networks. ReSiPI dynamically deploys inter-chiplet photonic gateways based on runtime traffic and employs switching elements based on phase change materials (PCMs) to reconfigure and power-gate the photonic interposer network, resulting in lower latency, reduced power consumption, and improved energy minimization compared to prior state-of-the-art 2.5D photonic networks.

Finally, to overcome the limitations of computation density of monolithic processing chips and slow metallic interconnects in electronic accelerators for domain-specific machine learning (ML) processing, this research proposes the integration of optical computation and communication into 2.5D chiplet platforms, enabling sustainable and scalable ML hardware accelerators.

In summary, this dissertation makes significant contributions to the field of NoCs by addressing the challenges of latency, energy efficiency, and fault tolerance in 3D and 2.5D topologies and interposer designs. It proposes novel algorithms and techniques to improve the performance, reliability, and power efficiency of NoCs for future computing systems. The findings of this research have important implications for the design and optimization of on-chip communication architectures in advanced computing systems. The proposed solutions have the potential to greatly impact the design of future computing systems, meeting the increasing demand for high-performance and energy-efficient computing, and paving the way for sustainable and scalable hardware accelerators for machine learning and other computationally intensive applications.

Adviser: Prof. Mahdi Nikdast
Co-Adviser: NA
Non-ECE Member: Prof. Yashwant Malaiya
Member 3: Prof. Sudeep Pasricha
Addional Members: Prof. Anura Jayasumana

Publications:
7- Febin Sunny, Ebadollah Taheri, Mahdi Nikdast, and Sudeep Pasricha, "A Survey on Silicon Photonics for Deep Learning in IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, 2023.
6- Ebadollah Taheri, Ryan Kim, and Mahdi Nikdast, "AdEle+: An Adaptive Congestion-and-Energy-Aware Elevator Selection for Partially Connected 3D Networks-on-Chips" in IEEE Transaction of Computers (IEEE TC), 2023.
5- Ebadollah Taheri, Sudeep Pasricha, and Mahdi Nikdast, "ReSiPI: A Reconfigurable Silicon-Photonic 2.5D Chiplet Network with PCMs for Energy-Efficient Interposer Communication" in IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2022
4- Ebadollah Taheri, Sudeep Pasricha, and Mahdi Nikdast, "DeFT: A Deadlock-Free and Fault-Tolerant Routing Algorithm for 2.5 D Chiplet Networks" in IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, 2022.
3- Ebadollah Taheri, Ryan Kim, and Mahdi Nikdast, "AdEle: An Adaptive Congestion-and-Energy-Aware Elevator Selection for Partially Connected 3D NoCs" in IEEE/ACM Design Automation Conference (DAC), 2021.
2- Febin Sunny, Ebadollah Taheri, Mahdi Nikdast, and Sudeep Pasricha, "A Survey on Silicon Photonics for Deep Learning ", ACM Journal on Emerging Technologies in Computing Systems, 2021
1- Asif Mirza, Shadi Manafi Avari, Ebadollah Taheri, Sudeep Pasricha, and Mahdi Nikdast, "Opportunities for Cross-Layer Design in High-Performance Computing Systems with Integrated Silicon Photonic Networks" in IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, 2020

Program of Study:
VLSI System Design
Experimnts/VLSI System Desgn I
Silicon Photonic Comput System
Machine Learn/Adaptive Systems
Independent Study
Graduate Research Skills
Ethical Conduct of Research
STEM Communication