On-Chip Communication Architectures (System on Chip Interconnect)

Authors: Sudeep Pasricha and Nikil Dutt
Pages: 544
Publisher: Morgan Kaufmann, 2008
ISBN: 978-0-12-373892-9
AvailableAmazon and Elsevier


  • Overview of System-on-Chips
  • Basic Concepts of Bus-based Communication Architectures
  • On-chip Communication Architecture Standards
  • Models for Performance Exploration
  • Models for Power and Thermal Estimation
  • Synthesis of On-chip Communication Architectures
  • Encoding Techniques
  • Custom On-chip Communication Architecture Design
  • Refinement and Interface Synthesis
  • Verification and Security Issues
  • Physical Design Trends for Interconnects
  • Networks on Chips
  • Emerging On-chip Interconnect Technologies

About the Book

Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R&D efforts and dollars are increasingly focused on communication architecture design. This book is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures.


Book Slides

Chap 1: Introduction [ppt]
Chap 2: Basic On-Chip Communication Architecture Concepts [ppt]
Chap 3: On-chip Communication Architecture Standards [ppt]
Chap 4: Models for Performance Exploration [ppt]
Chap 5: Models for Power and Thermal Estimation [ppt]
Chap 6: Synthesis of On-chip Communication Architectures [ppt]
Chap 7: Encoding Techniques for On-chip Communication Architectures [ppt (figures only)]
Chap 8: Custom Bus-based On-chip Communication Architecture Design [ppt (figures only)]
Chap 9: On-chip Communication Architecture Refinement and Interface Synthesis [ppt (figures only)]
Chap 10: Verification and Security Issues in On-chip Communication Architecture Design [ppt (figures only)]
Chap 11: Physical Design Trends for Interconnects [ppt]
Chap 12: Networks on Chips [ppt]
Chap 13: Emerging On-chip Interconnect Technologies [ppt]

A convenient zip archive of the presentations can be downloaded from here.