Publications

Disclaimer: The following publications are covered by copyright. Permission to make digital/hard copy of all or part of the following papers, technical reports, and presentations for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage. To copy otherwise, to republish, to post on servers, or to redistribute to lists requires prior specific permission.

 Books Journal Articles  Conference Papers
Book Chapters  Conference Tutorials

Books

B7 S. Pasricha, M. Shafique, “Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Use Cases and Emerging Challenges“, Springer Nature Publishers, 2023 
B6 S. Pasricha, M. Shafique, “Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Software Optimizations and Hardware/Software Codesign“, Springer Nature Publishers, 2023 
B5 S. Pasricha, M. Shafique, “Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Hardware Architectures“, Springer Nature Publishers, 2023 
B4 V. Kukkala, S. Pasricha, “Machine Learning and Optimization Techniques for Automotive Cyber-Physical Systems“, Springer Nature Publishers, 2023. 
B3 S. Tiku, S. Pasricha,”Machine Learning for Indoor Localization and Navigation, Springer Nature Publishers, 2023
B2 M. Nikdast, S. Pasricha, G. Nicolescu, A. Sysedi, D. Liang, “Silicon Photonics for High Performance Computing and Beyond“, CRC Press/Taylor & Francis Group, 2021
B1 S. Pasricha, and N. Dutt. “On-Chip Communication Architectures”, Morgan Kauffman, ISBN 978-0-12-373892-9, Apr 2008

Peer Reviewed Journal Articles

J96 A. Mirza, R. Gloekler, J. Thompson, S. Pasricha, M. Nikdsast, “Experimental Analysis of Adiabatic Silicon Photonic Microring Resonators under Process Variations”, IEEE Photonics Technology Letters, 2024.
J95 S. Kasdorf, B. Troksa, C. Key, J. Harmon, S. Pasricha, and B. M. Notaroš “Parallel GPU Optimization of the Shooting and Bouncing Ray Tracing Methodology for Propagation Modeling”, IEEE Transactions on Antennas and Propagation, 2023.
J94 D. Gufran, S. Tiku, S. Pasricha, “STELLAR: Siamese Multi-Headed Attention Neural Networks for Overcoming Temporal Variations and Device Heterogeneity with Indoor Localization”, IEEE Journal of Indoor and Seamless Positioning and Navigation, 2023.
J93 K. Khan, S. Pasricha, “A Reinforcement Learning Framework with Region-Awareness and Shared Path Experience for Efficient Routing in Networks-on-Chip”, IEEE Design & Test, 2023
J92 S. Afifi, F. Sunny, A. Shaifee, M. Nikdast, S. Pasricha, “GHOST: A Graph Neural Network Accelerator using Silicon Photonics”, ACM Transactions on Embedded Computing Systems (TECS), 2023.
J91 D. Gufran, S. Pasricha, “FedHIL: Heterogeneity Resilient Federated Learning for Robust Indoor Localization with Mobile Devices”, ACM Transactions on Embedded Computing Systems (TECS), 2023.
J90 D. Gufran, S. Tiku, S. Pasricha, “SANGRIA: Stacked Autoencoder Neural Networks with Gradient Boosting for Indoor Localization”, IEEE Embedded Systems Letters, 2023.
J89 S. Pasricha, M. Wolf, “Ethical Design of Computers: From Semiconductors to IoT and Artificial Intelligence”, IEEE Design & Test, 2023.
J88 D. Machovec, H. J. Siegel, J. A. Crowder, S. Pasricha, A. A. Maciejewski, R. D. Friese, “Surveillance Mission Scheduling with Unmanned Aerial Vehicles in Dynamic Heterogeneous Environments”, Journal of Supercomputing, 2023.
J87 A. Shafiee, S. Pasricha, M. Nikdast, “A Survey on Optical Phase-Change Memories: The Promise and Challenges”, IEEE Access, 2023.
J86 S. Banerjee, K. Chakrabarty, S. Pasricha, M. Nikdast, “Pruning Coherent Integrated Photonic Neural Networks”, IEEE Journal of Selected Topics in Quantum Electronics, (JSTQE), 2023.
J85 A. Shafiee, S. Banerjee, K. Chakrabarty, S. Pasricha, M. Nikdast, “Characterization and Optimization of Coherent MZI-based Nanophotonic Neural Networks under Fabrication Non-Uniformity”, IEEE Transactions on Nanotechnology, (TNANO), 2022.
J84 S. Pasricha, “AI Ethics in Smart Healthcare”, IEEE Consumer Electronics, 2023.
J83 S. Pasricha, “Ethics for Digital Medicine: A Path for Ethical Emerging Medical IoT Design”, IEEE Computer, 2023.
J82 N. Hogade, S. Pasricha, “A Survey on Machine Learning for Geo-Distributed Cloud Data Center Management”, IEEE Transactions on Sustainable Computing (TSUSC), 2023.
J81 S. Pasricha, J. Jose, S. Deb, “Electronic, Wireless, and Photonic Network-on-Chip Security: Challenges and Countermeasures”, Vol. 39, Iss. 6, pp. 90-98, IEEE Design & Test, Dec 2022.
J80 S. Pasricha, “Embedded Systems Education: Experiences with Application-Driven Pedagogy”, Vol. 14, Iss. 4, pp. 167-170, IEEE Embedded Systems Letters, Dec 2022.
J79 V. K. Kukkala, S. V. Thiruloga, and S. Pasricha, “Roadmap for Cybersecurity in Autonomous Vehicles”, Vol. 11, Iss. 6, pp. 13-23, IEEE Consumer Electronics, Nov 2022.
J78 A. Ganguly, S. Abadal, I. Thakkar, N. E. Jerger, M. Riedel, M. Babaie, R. Balasubramonian, A. Sebastian, S. Pasricha, B. Taskin, “Interconnects for DNA, Quantum, In-Memory and Optical Computing: Insights from a Panel Discussion”, IEEE Micro, Volume: 42, Issue: 3, 01 May-June 2022.
J77 A. Mirza, F. Sunny, P. Walsh, K. Hassan, S. Pasricha, M. Nikdast, “Silicon Photonic Microring Resonators: A Comprehensive Design-Space Exploration and Optimization under Fabrication-Process Variations”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (TCAD), Volume: 41, Issue: 10, Oct 2022.
J76 A. Shafiee, S. Pasricha, M. Nikdast, “Silicon Photonics for Future Computing Systems”, Wiley On-Line Encyclopedia, May 2022.
J75 V. S. P. Karempudi, F. Sunny, I. Thakkar, M. Nikdast, and S. Pasricha, “Photonic Networks-on-Chip Employing Multilevel Signaling: A Cross-Layer Comparative Study”, ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 18, Issue 3, July 2022. 
J74 V. K. Kukkala, S. V. Thiruloga, and S. Pasricha, “LATTE: LSTM Self-Attention based Anomaly Detection in Embedded Automotive Platforms”, ACM Transactions on Embedded Computing Systems (TECS), Volume 20, Issue 5s, Oct 2021. 
J73 F. Sunny, A. Mirza, M. Nikdast, S. Pasricha, “ROBIN: A Robust Optical Binary Neural Network Accelerator”, ACM Transactions on Embedded Computing Systems (TECS), Volume 20, Issue 5s, Oct 2021. 
J72 L. Wang, S. Tiku, S. Pasricha, “CHISEL: Compression-Aware High-Accuracy Embedded Indoor Localization with Deep Learning”, IEEE Embedded System Letters, Vol. 14, Iss. 1, Mar 2022. 
J71 N. Hogade, S. Pasricha, H.J. Siegel, “Energy and Network Aware Workload Management for Geographically Distributed Data Centers”, IEEE Transactions on Sustainable Computing (TSUSC), Volume: 7, Issue: 2, April-June 2022
J70 S. Tiku, P. Kale, S. Pasricha, “QuickLoc: Adaptive Deep-Learning for Fast Indoor Localization with Mobile Devices”, ACM Transactions on Cyber-Physical Systems (TCPS), Vol. 17, Iss. 4, Oct 2021
J69 F. Sunny, E. Taheri, M. Nikdast, S. Pasricha, “A Survey on Silicon Photonics for Deep Learning”, ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 17, Iss. 4, Oct 2021. 
J68 F. Sunny, A. Mirza, I. Thakkar, M. Nikdast, S. Pasricha, “ARXON: A Framework for Approximate Communication over Photonic Networks-on-Chip”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 29, Jun 2021.
J67 D. Dang, S. V. R. Chittamuru, S. Pasricha, R. Mahapatra, D. Sahoo, “BPLight-CNN: A Photonics-based Backpropagation Accelerator for Deep Learning”, ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 17, Iss. 4, Oct 2021.
J66 S. V. R. Chittamuru, I. Thakkar, S. Pasricha, S. S. Vatsavai, and V. Bhat, “Exploiting Process Variations to Secure Photonic NoC Architectures from Snooping Attacks”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (TCAD), Volume: 40, Issue: 5, May 2021.
J65 J. Dey, W. Taylor, S. Pasricha, “VESPA: Optimizing Heterogeneous Sensor Placement and Orientation for Autonomous Vehicles”, IEEE Consumer Electronics, 10(2), Mar 2021.
J64 V. K. Kukkala, S. V. Thiruloga, and S. Pasricha, “INDRA: Intrusion Detection using Recurrent Autoencoders in Automotive Embedded Systems”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (TCAD), 39(11), Nov 2020. 
J63 S. Pasricha, Raid Ayoub, M. Kishinevsky, S. K. Mandal, U. Y. Ogras, “A Survey on Energy Management for Mobile and IoT Devices”, IEEE Design and Test, vol. 37, no. 5, pp. 7-24, Oct 2020
J62 K. Khan, S. Pasricha, R. G. Kim, “A Survey of Resource Management for Processing-in-Memory and Near-Memory Processing Architectures”, Journal of Low Power Electronics and Applications, Special Issue on Design Space Exploration and Resource Management of Multi/Many-Core Systems, Sep 2020. 
J61 S. Tiku, S. Pasricha, B. Notaros, Q. Han,“A Hidden Markov Model based Smartphone Heterogeneity Resilient Portable Indoor Localization Framework”, Journal of Systems Architecture, Vol 108, Sep 2020.
J60 S. Pasricha, M. Nikdast, “A Survey of Silicon Photonics for Energy Efficient Manycore Computing IEEE Design and Test, vol. 37, no. 4, pp. 60-81, Aug 2020.
J59  V. Kukkala, S. Pasricha, T. H. Bradley, “SEDAN: Security-Aware Design of Time-Critical Automotive Networks”, IEEE Transactions on Vehicular Technology (TVT), vol. 69, no. 8, Aug 2020
J58 V. Y. Raparti, S. Pasricha, “Approximate NoC and Memory Controller Architectures for GPGPU Accelerators, IEEE Transactions on Parallel and Distributed Systems (TPDS), Vol. 31, Iss 5., May 2020.
J57 S. Tiku, S. Pasricha, “Overcoming Security Vulnerabilities in Deep Learning Based Indoor Localization on Mobile Devices”, ACM Transactions on Embedded Computing Systems (TECS), Vol. 18, Iss. 6, Jan 2020
J56 V. Kukkala, S. Pasricha, T. H. Bradley, “JAMS-SG: A Framework for Jitter-Aware Message Scheduling for Time-Triggered Automotive Networks”, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 24, Iss. 6, Nov 2019
J55 S. Tiku, S. Pasricha, “PortLoc: A Portable Data-driven Indoor Localization Framework for Smartphones, IEEE Design and Test, Vol. 36, Iss. 5, Oct 2019
J54 A. Khune, S. Pasricha, “Mobile Network-Aware Middleware Framework for Energy Efficient Cloud Offloading of Smartphone Applications”, IEEE Consumer Electronics, Vol. 8, Iss. 1, Jan 2019.
J53 V. Y. Raparti, S. Pasricha, “RAPID: Memory-Aware NoC for Latency Optimized GPGPU Architectures“, IEEE Transactions on Multi-Scale Computing Systems (IEEE TMSCS), Vol. 4, No. 4, Oct-Dec 2018. 
J52 S. V. R. Chittamuru, I. Thakkar, S. Pasricha, “LIBRA: Thermal and Process Variation Aware Reliability Management in Photonic Networks-on-Chip“, IEEE Transactions on Multi-Scale Computing Systems (IEEE TMSCS), Vol. 4, No. 4, Oct-Dec 2018.
J51 S. V. R. Chittamuru, D. Dharnidhar, S. Pasricha, R. Mahapatra “BiGNoC: Accelerating Big Data Computing with Application-Specific Photonic Network-on-Chip Architectures“, IEEE Transactions on Parallel and Distributed Systems (TPDS), Vol. 29, Iss. 11, Nov 2018. 
J50 J. Tunnell, Z. Asher, S. Pasricha, T. H. Bradley, “Towards Improving Vehicle Fuel Economy with ADAS”,  SAE International Journal of Connected and Automated Vehicles, Oct 2018.
J49 N. Hogade, S. Pasricha, A. A. Maciejewski, H.J. Siegel, M. Oxley, E. Jonardi, “Minimizing Energy Costs for Geographically Distributed Heterogeneous Data Centers“, IEEE Transactions on Sustainable Computing (TSUSC), Vol. 3, No. 4, Oct-Dec 2018.
J48 D. Dauwe, S. Pasricha, A. A. Maciejewski, H.J. Siegel, “Resilience-Aware Resource Management for Exascale Computing Systems”, IEEE Transactions on Sustainable Computing (TSUSC), Vol. 3, No. 4, Oct-Dec 2018.
J47 V. Kukkala, J. Tunnell, S. Pasricha, “Advanced Driver Assistance Systems: A Path Toward Autonomous Vehicles“, IEEE Consumer Electronics, Vol. 7, Iss. 5, Sept 2018.
J46 I. Thakkar, S. Pasricha, “DyPhase: A Dynamic Phase Change Memory Architecture with Symmetric Write Latency and Restorable Endurance”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (TCAD), Volume: 37, Issue: 9 , Sept. 2018.
J45 Y. Xiang, S. Pasricha, “Mixed-Criticality Scheduling on Heterogeneous Multicore Systems Powered by Energy Harvesting”, Integration, the VLSI Journal, vol. 61, pp. 114-124, Mar 2018.
J44 M. Oxley, E. Jonardi, S. Pasricha, H. J. Siegel, T. Maciejewski, P. J. Burns, and G. Koenig “Rate-based Thermal, Power, and Co-location Aware Resource Management for Heterogeneous Data Centers”, Journal of Parallel and Distributed Computing (JPDC), vol. 12, part 2, pp. 126-139, Feb 2018.
J43 S. V. R. Chittamuru, I. Thakkar, S. Pasricha, “HYDRA: Heterodyne Crosstalk Mitigation with Double Microring Resonators and Data Encoding for Photonic NoC”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 26, iss. 1, pp. 168 – 181, Jan 2018.
J42 Y. Biran, S. Pasricha, G. Collins, J. Dubow, “Clean Energy Use for Cloud Computing Federation Workloads”, Advances in Science, Technology and Engineering Systems Journal, vol. 2, Issue 6, pp. 1-12, 2017.
J41 H. Mahajan, T. Bradley, S. Pasricha, “Application of systems theoretic process analysis to a lane keeping assist system”, Journal of Reliability Engineering and System Safety, vol. 167, pp. 177-183, Nov. 2017.
J40 D. Machovec, B. Khemka, N. Kumbhare, S. Pasricha, A. A. Maciejewski, H. J. Siegel, A. Akoglu, G. A. Koenig, S. Hariri, C. Tunc, M. Wright, M. Hilton, R. Rambharos, C. Blandin, F. Fargo, A. Louri, N. Imam, “Utility-Based Resource Management in an Oversubscribed Energy-Constrained Heterogeneous Environment Executing Parallel Applications”, Journal of Parallel Computing (PARCO), Nov 2017.
J39 C. Langlois, S. Tiku, S. Pasricha, “Indoor localization with smartphones”, 6(4), IEEE Consumer Electronics, Oct 2017.
J38 Y. Raparti, N. Kapadia, S. Pasricha, “ARTEMIS: An Aging-Aware Runtime Application Mapping Framework for 3D NoC-based Chip Multiprocessors”, IEEE Transactions on Multi-Scale Computing Systems (TMSCS), Vol. 3, No. 2, pp. 72-85, Apr-Jun 2017. (Selected as Featured Paper for Apr-Jun 2017 issue)
J37 S. V. R. Chittamuru, S. Desai, S. Pasricha, “SWIFTNoC: A Reconfigurable Silicon-Photonic Network with Multicast Enabled Channel Sharing for Multicore Architectures”, ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 13, No. 4, pp. 58:1-58:27, Jun 2017.
J36 N. Kapadia, S. Pasricha, “A Runtime Framework for Robust Application Scheduling with Adaptive Parallelism in the Dark-Silicon Era”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 25, No. 2, pp. 534-546, Feb. 2017. 
J35 J. Dubow, Y. Biran, S. Pasricha, G. Collins, J. M. Borky, “Considerations for Planning a Multi-platform Energy Utility System”, Journal of Energy and Power Engineering, 09(12):723-749, Jan 2017.
J34 D. Dauwe, E. Jonardi, R. Friese, S. Pasricha, A. A. Maciejewski, D. Bader, H.J. Siegel, “HPC Node Performance and Energy Modeling Under the Uncertainty of Application Co-Location”, Journal of Supercomputing, Vol. 72, No. 12, pp. 4771-4809, Nov. 2016.
J33 S. Bahirat, S. Pasricha, “A Software Framework for Rapid Application-Specific Hybrid Photonic Network-on-Chip Synthesis”, Electronics, Special Issue on Rapid System Design with Dedicated Architectures and Specific Software Tools, 5(2), 21, 2016.
J32 N. Kapadia, S. Pasricha, “A System-Level Co-Synthesis Framework for Power Delivery and On-chip Data Networks in Application-Specific 3D ICs”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol.24, no.1, pp.3-16, Jan. 2016. 
J31 Y. Xiang, S. Pasricha, “Soft and Hard Reliability-Aware Scheduling for Multicore Embedded Systems with Energy Harvesting”, IEEE Transactions on Multi-Scale Computing Systems (TMSCS), Oct-Dec, vol. 1, no. 4, pp. 220-235, 2015.
J30 Y. Xiang, S. Pasricha, “Run-Time Management for Multi-Core Embedded Systems with Energy Harvesting”,  IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol.23, no.12, pp.2876-2889, Dec. 2015. 
J29 M. Oxley, S. Pasricha, A. A. Maciejewski, H. J. Siegel, J. Apodaca, D. Young, L. Briceno, J. Smith, S. Bahirat, B. Khemka, A. Ramirez and Y. Zou,, “Makespan and Energy Robust Stochastic Static Resource Allocation of Bags-of-Tasks to a Heterogeneous Computing System”, IEEE Transactions on Parallel and Distributed Systems (TPDS), vol.26, no.10, pp. 2791-2805, Oct. 2015. 
J28 I. Thakkar, S. Pasricha, “3D-ProWiz: An Energy-Efficient and Optically-Interfaced 3D DRAM Architecture with Reduced Data Access Overhead”, IEEE Transactions on Multi-Scale Computing Systems (TMSCS), vol.1, no.3, pp.168-184, Sep. 2015. 
J27 I. Thakkar, S. Pasricha, “3D-WiRED: A Novel Wide I/O DRAM with Energy-Efficient 3D Bank Organization”, IEEE Design and Test (D&T), vol.32, no.4, pp.71-80, Aug. 2015. 
J26 B. Donohoo, C. Ohlsen, S. Pasricha, “A Middleware Framework for Application-aware and User-specific Energy Optimization in Smart Mobile Devices”, Journal of Pervasive and Mobile Computing, vol. 20, pp. 47-63, Jul 2015. 
J25 S. V. R. Chittamuru, S. Pasricha, “Crosstalk Mitigation for High-Radix and Low-Diameter Photonic NoC Architectures”, IEEE Design and Test (D&T), vol.32, no.3, pp.29-39, June 2015.  
J24 B. Khemka, R. Friese, S. Pasricha, A. A. Maciejewski, H. J. Siegel, G. A. Koenig, S. Powers, M. Hilton, R. Rambharos, and S. Poole, “Utility Maximizing Dynamic Resource Management in an Oversubscribed Energy-Constrained Heterogeneous Computing System”, Journal of Sustainable Computing: Informatics and Systems, 2014, Volume 5, pp. 14–30, March 2015. 
J23 A. M. Al-Qawasmeh, S. Pasricha, A. M. Maciejewski, H. J. Siegel, “Power and Thermal-Aware Workload Allocation in Heterogeneous Data Centers”, IEEE Transactions on Computers, vol. 64, Iss 02, pp. 477-491, Feb 2015. 
J22 Y. Xu, S. Pasricha, “Silicon Nanophotonics for Future Multicore Architectures: Opportunities and Challenges, IEEE Design and Test (D&T), Special Issue on Silicon Nanophotonics for Future Multicore Architectures, Sep/Oct, pp. 9-17, 2014.
J21 B. Donohoo, C. Ohlsen, S. Pasricha, C. Anderson, Y. Xiang, “Context-Aware Energy Enhancements for Smart Mobile Devices”, IEEE Transactions on Mobile Computing (TMC), Vol 13, No. 8, pp. 1720-1732, Aug 2014. 
J20 S. Bahirat, S. Pasricha, “METEOR: Hybrid Photonic Ring-Mesh Network-on-Chip for Multicore Architectures”, ACM Transactions on Embedded Computing Systems (TECS), 13(3):116:1-116:33, Mar 2014. 
J19 L. Bathen, Y. Ahn, S. Pasricha, N. Dutt, “MultiMaKe: Chip-Multiprocessor Driven Memory-aware Kernel Pipelining”, ACM Transactions on Embedded Computing Systems (TECS), 12(1), Mar 2013. 
J18 Y. Zou, Y. Xiang, S. Pasricha, “Characterizing Vulnerability of Network Interfaces in Embedded Chip Multiprocessors”, IEEE Embedded System Letters, 4(2), Jun 2012. 
J17 D. Young, J. Apodaca, L. Briceno, J. Smith, S. Pasricha, A. Maciejewski, H. Siegel, S. Bahirat, B. Khemka, A. Ramirez and Y. Zou, “Deadline and Energy Constrained Dynamic Resource Allocation in a Heterogeneous Computing Environment”, Journal of Supercomputing, 2012. 
J16 N. Kapadia, S. Pasricha, “A Framework for Low Power Synthesis of Interconnection Networks-on-Chip with Multiple Voltage Islands “,  Integration, the VLSI Journal, 45(3):271-281, Jun 2012. 
J15 Y. Park, S. Pasricha, F. Kurdahi, N. Dutt, “A Multi-Granularity Power Modeling Methodology for Embedded Processors” , IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 19, No. 4, pp. 668-681, Apr 2011 
J14 Y. Zou, S. Pasricha, “NARCO: Neighbor Aware Turn Model Based Fault Tolerant Routing for NoCs“,  IEEE Embedded System Letters, Vol. 2, No. 3, Sep 2010.
J13 S. Pasricha, F. Kurdahi, N. Dutt, “Evaluating Carbon Nanotube Global Interconnects for Chip Multiprocessor Applications“, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 18, No. 9, pp. 1376-1380, Sep 2010.
J12 S. Pasricha, Y. Park, F. Kurdahi, N. Dutt, “CAPPS: A Framework for Power-Performance Trade-Offs in Bus Matrix Based On-Chip Communication Architecture Synthesis“, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 18, No. 2, pp. 209-221, Feb 2010. 
J11 G. Madl, S. Pasricha, N. Dutt, S. Abdelwahed, “Cross-abstraction Functional Verification and Performance Analysis of Chip Multiprocessor Designs“, IEEE Transactions on Industrial Informatics (TII), Vol. 5, No. 3Aug 2009
J10 D. Cho, S. Pasricha, I. Issenin, N. Dutt, Y. Paek , “Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications“, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (TCAD), Vol. 28, No. 4, pp. 554-567, Apr 2009 
J9 S. Pasricha, Y. Park, F. Kurdahi, N. Dutt, “System-level PVT Variation Aware Power Exploration of On-Chip Communication Architectures“, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 14, No. 2, pp. 20:1-20:25, Mar 2009
J8 S. Pasricha, N. Dutt, “Trends in Emerging On-Chip Interconnect Technologies“, IPSJ Transactions on System LSI Design Methodology, Vol. 1, Sep 2008
J7 S. Pasricha, N. Dutt, M. Ben-Romdhane, “Fast Exploration of Bus-based Communication Architectures at the CCATB Abstraction“, ACM Transactions on Embedded Computing Systems (TECS), Feb 2008 
J6 S. Pasricha, N. Dutt, M. Ben-Romdhane, “BMSYN: Bus Matrix Communication Architecture Synthesis for MPSoC“, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (TCAD), vol.26, no.8, pp.1454-1464, Aug 2007
J5 S. Pasricha, N. Dutt, “A Framework for Co-synthesis of Memory and Communication Architectures for MPSoC“, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 26, No. 3, pp. 408-420, Mar 2007 
J4 C. Shin, P. Grun, N. Romdhane, C. Lennard, G. Madl, S. Pasricha, N. Dutt, M. Noll, “Enabling Heterogeneous Cycle-Based and Event-Driven Simulation in a SPIRIT-Enabled Design Flow“, Kluwer Journal on Design Automation of Embedded Systems (DAES), Feb 2007.
J3 S. Pasricha, N. Dutt, E. Bozorgzadeh, M. Ben-Romdhane, “FABSYN: Floorplan-aware Bus Architecture Synthesis”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol 14, No. 3, pp 241-253, Mar 2006 
J2 S. Pasricha, M. Luthra, S. Mohapatra, N. Dutt, N. Subramanian, “Dynamic Backlight Adaptation for Low Power Handheld Devices“,  IEEE Design and Test (D&T), Special Issue on Embedded Systems for Real Time Embedded Systems, Sep-Oct 2004
J1 S. Pasricha, S. Mohapatra, M. Luthra, N. Dutt, N. Subramanian, “Co-optimization of Streaming Multimedia QoS and Backlight Power Consumption for Mobile Handheld Devices“, Special Issue Journal of Korean Multimedia Society (KSSM), Dec 2003

Peer Reviewed Conference Papers

C182 S. Pasricha, “Ethical Design of Artificial Intelligence for the Internet of Things: A Smart Healthcare Perspective”,   IEEE/ACM DATE, Mar 2024.
C181 S. Afifi, F. Sunny, M. Nikdast, S. Pasricha, “Accelerating Neural Networks for Large Language Models and Graph Processing with Silicon Photonics”,   IEEE/ACM DATE, Mar 2024.
C180 F. Sunny, A. Shaifee, B. Charbonnier, M. Nikdast, S. Pasricha, “COMET: A Cross-Layer Optimized Optical Phase Change Main Memory Architecture”,  IEEE/ACM DATE, Mar 2024.
C179 D. Gufran, S. Pasricha, “CALLOC: Curriculum Adversarial Learning for Secure and Robust Indoor Localization”,  IEEE/ACM DATE, Mar 2024.
C178 S. Qi, D. Milojicic, C. Bash, S. Pasricha, “MOSAIC: A Multi-Objective Optimization Framework for Sustainable Datacenter Management”,  IEEE International Conference on High Performance Computing, Data, Analytics, and Data Science (HiPC), Goa, India, Dec 2023.
C177 E. Taheri, M. A. Mahdian, S. Pasricha, M. Nikdast, “TRINE: A Tree-Based Silicon Photonic Interposer Network for Energy-Efficient 2.5D Machine Learning Acceleration”, IEEE/ACM 16th International Workshop on Network on Chip Architectures (NoCArc), 2023.
C176 A. Shafiee, S. Banerjee, B. Charbonnier, S. Pasricha, and M. Nikdast, “Compact and Low-Loss PCM-based Silicon Photonic MZIs for Photonic Neural Networks,” IEEE Photonics Conference (IPC), Orlando, FL, Nov 2023.
C175 S. Qi, D. Milojicic, C. Bash, S. Pasricha, “SHIELD: Sustainable Hybrid Evolutionary Learning Framework for Carbon, Wastewater, and Energy-Aware Data Center Management,” IEEE International Green and Sustainable Computing Conference (IGSC), Toronto, Canada, Oct 2023. (Best Paper Award)
C174 K. Khan, S. Pasricha, “A Reinforcement Learning Framework with Region-Awareness and Shared Path Experience for Efficient Routing in Networks-on-Chip”, IEEE/ACM NOCS, Oct 2023.
C173 S. Afifi, F. Sunny, A. Shaifee, M. Nikdast, S. Pasricha, “GHOST: A Graph Neural Network Accelerator using Silicon Photonics”, IEEE/ACM CASES (ESWEEK), Oct 2023.
C172 D. Gufran, S. Pasricha, “FedHIL: Heterogeneity Resilient Federated Learning for Robust Indoor Localization with Mobile Devices”, IEEE/ACM CODES+ISSS (ESWEEK), Oct 2023.
C171 A. Shafiee, B. Charbonnier, S. Pasricha, M. Nikdast;, “Multiphysics Simulation Approach for Photonic Devices Integrating Phase Change Materials”, Proc. International Conference on Numerical Simulation of Optoelectronic Devices, Turin, Italy, Sep 2023.
C170 C. Ogbogu, M. Abernot, C. Delacour, A. Todri-Sanial, S. Pasricha, P. P. Pande, “Energy-Efficient Machine Learning Acceleration: From Technologies to Circuits and Systems”, Proc. IEEE ISLPED, Vienna, Austria, Aug 2023.
C169 F. Sunny, M. Nikdast, S. Pasricha, “Cross-Layer Design for AI Acceleration with Non-Coherent Optical Computing”, ACM GLSVLSI, 2023.
C168 A. Shafiee, S. Pasricha, M. Nikdast, “Design-Space Exploration in PCM-based Photonic Memory”, ACM GLSVLSI, 2023.
C167 S. Pasricha, “Ethics in Computing Education: Challenges and Experience with Embedded Ethics”, ACM GLSVLSI, 2023.
C166 S. Afifi, F. Sunny, M. Nikdast, S. Pasricha, “TRON: Transformer Neural Network Acceleration with Non-Coherent Silicon Photonics”, ACM GLSVLSI, 2023.
C165 S. Pasricha, “Efficient Embedded Machine Learning Deployment on Edge and IoT Devices”, IEEE/ACM DAC, 2023 (Invited)
C164 D. Gufran, S. Tiku, S. Pasricha, “VITAL: Vision Transformer Neural Networks for Smartphone Heterogeneity Resilient and Accurate Indoor Localization”, IEEE/ACM DAC, 2023.
C163 A. Balasubramaniam, F. Sunny, S. Pasricha, “R-TOSS: A Framework for Real-Time Object Detection using Semi-Structured Pruning”, IEEE/ACM DAC, 2023.
C162 F. Sunny, E. Taheri, M. Nikdast, S. Pasricha, “Machine Learning Accelerators in 2.5D Chiplet Platforms with Silicon Photonics”, IEEE/ACM DATE, 2023.
C161 S. Qi, S. Pasricha, R. Kim, “MOELA: A Multi-Objective Evolutionary/Learning Design Space Exploration Framework for 3D Heterogeneous Manycore Platforms”, IEEE/ACM DATE, 2023.
C160 M. Nikdast, S. Pasricha, K. Chakrabarty, “Silicon Photonic Neural Network Accelerators: Opportunities and Challenges”, CLEO, 2023.
C159 E. Taheri, S. Pasricha, M. Nikdast, “ReSiPI: A Reconfigurable Silicon-Photonic 2.5D Chiplet Network with PCMs for Energy-Efficient Interposer Communication, IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2022.
C158 L. Wang, S. Pasricha, “A Framework for CSI-Based Indoor Localization with 1D Convolutional Neural Networks”, IEEE Conference on Indoor Positioning and Indoor Navigation (IPIN), 2022
C157 S. Tiku, D. Gufran, S. Pasricha, “Multi-Head Attention Neural Network for Smartphone Invariant Indoor Localization”, IEEE Conference on Indoor Positioning and Indoor Navigation (IPIN), 2022 (Best Paper Award Candidate)
C156 J. Dey, S. Pasricha, “Co-Optimizing Sensing and Deep Machine Learning in Automotive Cyber-Physical Systems”, IEEE Euromicro Conference on Digital Systems Design, 2022
C155 J. Dey, S. Pasricha, “Robust Perception Architecture Design for Automotive Cyber-Physical Systems”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2022
C154 F. Sunny, M. Nikdast and S. Pasricha, “RecLight: A Recurrent Neural Network Accelerator With Integrated Silicon Photonics”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2022.
C153 S. Banerjee, M. Nikdast, S. Pasricha, K. Chakrabarty, “Pruning Coherent Integrated Photonic Neural Networks Using the Lottery Ticket Hypothesis”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2022.
C152 S. Pasricha, “Embedded Systems Education in the 2020s: Challenges, Reflections, and Future Directions”, ACM GLSVLSI, 2022.
C151 K. Khan, S. Pasricha and R. Kim, “RACE: A Reinforcement Learning Framework for Improved Adaptive Control of NoC Channel Buffers”, ACM GLSVLSI, 2022. (Best Paper Award Candidate)
C150 A. Shafiee, S. Banerjee, K. Chakrabarty, S. Pasricha and M. Nikdast, “LoCI: An Analysis of the Impact of Optical Loss and Crosstalk Noise in Integrated Silicon-Photonic Neural Networks”, ACM GLSVLSI, 2022.
C149 F. Sunny, M. Nikdast and S. Pasricha, “A Silicon Photonic Accelerator for Convolutional Neural Networks with Heterogeneous Quantization”, ACM GLSVLSI, 2022.
C148 S. Banerjee, M. Nikdast, S. Pasricha, K. Chakrabarty, “CHAMP: Coherent Hardware-Aware Magnitude Pruning of Integrated Photonic Neural Networks”, IEEE OFC, 2022.
C147 S. Tiku, S. Pasricha, “Siamese Neural Encoders for Long-Term Indoor Localization with Mobile Devices”, IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, Mar 2022.
C146 E. Taheri, M. Nikdast, S. Pasricha, “DeFT: A Deadlock-Free and Fault-Tolerant Routing Algorithm for 2.5D Chiplet Systems”, IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, Mar 2022.
C145 S. V. Thiruloga, V. K. Kukkala, and S. Pasricha, “TENET: Temporal CNN with Attention for Anomaly Detection in Automotive Cyber-Physical Systems”, IEEE/ACM Asia & South Pacific Design Automation Conference (ASPDAC), Jan 2022. (Best Paper Award Candidate)
C144 F. Sunny, M. Nikdast, and S. Pasricha, “SONIC: A Sparse Neural Network Inference Accelerator with Silicon Photonics for Energy-Efficient Deep Learning”, IEEE/ACM Asia & South Pacific Design Automation Conference (ASPDAC), Jan 2022.
C143 Q. Han, Y. Bao, S. Pasricha, “Improving Safety in Cyber Enabled Underground Mines”, 8th International Conference on Networking, Systems and Security (NSysS), December 21–23, 2021.
C142 A. Shafiee, A. Mirza, F. Sunny, S. Banerjee, K. Chakrabarty, S. Pasricha, and M. Nikdast, “Inexact Silicon Photonics: From Devices to Applications”, OSA, 2021.
C141 V. K. Kukkala, S. V. Thiruloga, and S. Pasricha, “LATTE: LSTM Self-Attention based Anomaly Detection in Embedded Automotive Platforms”, IEEE/ACM CODES+ISSS (ESWEEK), 2021.
C140 F. Sunny, A. Mirza, M. Nikdast, S. Pasricha, “ROBIN: A Robust Optical Binary Neural Network Accelerator”, IEEE/ACM CASES (ESWEEK), 2021.
C139 F. Sunny, A. Mirza, M. Nikdast, S. Pasricha, “CrossLight: A Cross-Layer Optimized Silicon Photonic Neural Network Accelerator”, IEEE/ACM Design Automation Conference (DAC), 2021
C138 V. K. Kukkala, S. V. Thiruloga, and S. Pasricha, “INDRA: Intrusion Detection using Recurrent Autoencoders in Automotive Embedded Systems”, IEEE/ACM CASES (ESWEEK), 2020.
C137 D. Machovec, J. A. Crowder, H. J. Siegel, S. Pasricha, and A. A. Maciejewski, “Dynamic Heuristics for Surveillance Mission Scheduling with Unmanned Aerial Vehicles in Heterogeneous Environments”, 22nd International Conference on Artificial Intelligence (ICAI’20), July 2020
C136 A. Mirza, S. Pasricha, and M. Nikdast, “Variation-Aware Inter-Device Matching in Silicon Photonic Microring Resonator Demultiplexers”, IEEE Photonics Conference (IPC), 2020.
C135 F. Sunny, A. Mirza, I. Thakkar, S. Pasricha, and M. Nikdast, “LORAX: Loss-Aware Approximations for Energy-Efficient Silicon Photonic Networks-on-Chip”, ACM Great Lakes Symposium on VLSI (GLSVLSI), 2020.
C134 A. Mirza, S. Avari, E. Taheri, S. Pasricha, and M. Nikdast, “Opportunities for cross-layer design in high-performance computing systems with integrated silicon photonic networks”, IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, March 2020.
C133 A. Mirza, F. Sunny, S. Pasricha, and M. Nikdast, “Silicon Photonic Microring Resonators: Design Optimization under Fabrication Non-uniformity“, IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, March 2020.
C132 S. Pasricha, N. Hogade, H.J. Seigel, A. A. Maciejewski, “Green Computing with Geo-Distributed Heterogeneous Data Centers,” IEEE International Green and Sustainable Computing Conference (IGSC), Alexandria, VA, USA, Oct. 2019.
C131 M. Adkins, Q. Han, S. Pasricha, “Quality-Aware Voice Convergecast in Mobile Low Power Wireless Networks”, IEEE International Conference on Mobile Computing, Applications and Services (MobiCASE), Hangzhou, China, June 14-15, 2019.
C130 S. Tiku, S. Pasricha, B. Notaros, Q. Han, “SHERPA: A Lightweight Smartphone Heterogeneity Resilient Portable Indoor Localization Framework“, IEEE International Conference on Embedded Software and Systems (ICESS), Las Vegas, NV, USA, Jun. 2019
C129 S. Bhosale, S. Pasricha, “SLAM: High Performance and Energy Efficient Hybrid Last Level Cache Architecture for Multicore Embedded Systems,” IEEE International Conference on Embedded Software and Systems (ICESS), Las Vegas, NV, USA, Jun. 2019
C128  Y. Raparti, S. Pasricha, “Lightweight Mitigation of Hardware Trojan Attacks in NoC-based Manycore Computing,” IEEE/ACM Design Automation Conference (DAC), Las Vegas, NV, USA, Jun. 2019
C127  I. Thakkar, S. V. R. Chittamuru, S. Pasricha, “Mitigating the Energy Impacts of VBTI Aging in Photonic Networks-on-Chip Architectures with Multilevel Signaling,” IEEE Workshop on Energy-efficient Networks of Computers (E2NC): from the Chip to the Cloud, Oct 2018. 
C126  Y. Raparti, S. Pasricha, “DAPPER: Data Aware Approximate NoC for GPGPU Architectures,” IEEE/ACM International Symposium on Networks-on-Chip (NOCS), Torino, Italy, Oct 2018. (Best Paper Award)
C125  S. Pasricha, S. V. R. Chittamuru, I. Thakkar, V. Bhat, “Securing Photonic NoC Architectures from Hardware Trojans,” IEEE/ACM International Symposium on Networks-on-Chip (NOCS), Torino, Italy, Oct 2018.
C124  Y. Raparti, S. Pasricha, “PARM: Power Supply Noise Aware Resource Management for NoC based Multicore Systems in the Dark Silicon Era,” IEEE/ACM Design Automation Conference (DAC), San Francisco, CA, USA, Jun. 2018.
C123  S. V. R. Chittamuru, I. Thakkar, S. Pasricha, “SOTERIA: Exploiting Process Variations to Enhance Hardware Security with Photonic NoC Architectures,” IEEE/ACM Design Automation Conference (DAC), San Francisco, CA, USA, Jun. 2018.
C122  D. Dauwe, S. Pasricha, A. A. Maciejewski, H. J. Siegel, “An Analysis of Multilevel Checkpoint Performance Models,” 20th Workshop on Advances in Parallel and Distributed Computational Models (APDCM), co-organized with IEEE International Parallel and Distributed Processing Symposium (IPDPS), Vancouver, BC, Canada, May 2018.
C121  A. Mittal, S. Tiku, S. Pasricha, “Adapting Convolutional Neural Networks for Indoor Localization with Smart Mobile Devices,” ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2018. (Best Paper Award)
C120  S. Pasricha, S. V. R. Chittamuru, I. Thakkar, “Cross-Layer Thermal Reliability Management in Photonic Networks-on-Chip,” ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2018.
C119  J. Tunnell, Z. Asher, S. Pasricha, T. H. Bradley, “Towards Improving Vehicle Fuel Economy with ADAS,” SAE International, Apr 2018.
C118  S. Pasricha, D. Bertozzi, H. Li, “Overcoming Reliability and Energy-Efficiency Challenges with Silicon Photonics for Future Manycore Computing,” IEEE VLSI Test Symposium, Apr 2018.
C117  Z. Asher, J. Tunnell, D. A. Baker, R. J. Fitzgerald, F. Banaei-Kashani, S. Pasricha, T. H. Bradley, “Enabling Prediction for Optimal Fuel Economy Vehicle Control,” SAE International, Apr 2018.
C116  D. Dauwe, S. Pasricha, A. A. Maciejewski, H. J. Siegel, “An Exploration of Fault Resilience Protocols for Large-Scale Application Execution on Exascale Computing Platforms,” 5th Exascale Applications and Software Conference (EASC), Edinburgh, Scotland, 2018. (Extended Abstract)
C115  S. Pasricha, “Overcoming Energy and Reliability Challenges for IoT and Mobile Devices with Data Analytics,” IEEE International Conference on VLSI Design (VLSID), Pune, India, Jan 2018.
C114  K. Yao, Y. Ye, S. Pasricha, J. Xu, “Thermal-Sensitive Design and Power Optimization for a 3D Torus-Based Optical NoC,” IEEE/ACM International Conference on Computer Aided Design (ICCAD), Nov 2017. 
C113  D. Dauwe, R. Jhaveri, S. Pasricha, A. A. Maciejewski, H. J. Siegel, “Optimizing Checkpoint Intervals for Reduced Energy Use in Exascale Systems,” IEEE Workshop on Energy-efficient Networks of Computers (E2NC): from the Chip to the Cloud, Orlando, FL, USA, Oct 2017. 
C112 V. K. Kukkala, S. Pasricha, T. Bradley, “JAMS: Jitter-Aware Message Scheduling for FlexRay Automotive Networks,” IEEE/ACM International Symposium on Networks-on-Chip (NOCS), Oct 2017.
C111 S. Tiku, S. Pasricha, “Energy-Efficient and Robust Middleware Prototyping for Smart Mobile Computing,” IEEE International Symposium on Rapid System Prototyping (RSP), Oct 2017.
C110  I. Thakkar, S. V. R. Chittamuru, S. Pasricha, “Improving the Reliability and Energy-Efficiency of High-Bandwidth Photonic NoC Architectures with Multilevel Signaling,” IEEE/ACM International Symposium on Networks-on-Chip (NOCS), Oct 2017.
C109 S. Pasricha, J. Doppa, K. Chakrabarty, S. Tiku, D. Dauwe, S. Jin, P. Pande, “Data Analytics Enables Energy-Efficiency and Robustness: From Mobile to Manycores, Datacenters, and Networks”, ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Oct 2017.
C108 S. V. R. Chittamuru, I. Thakkar, S. Pasricha, “Analyzing Voltage Bias and Temperature Induced Aging Effects  in Photonic Interconnects for Manycore Computing,” ACM System Level Interconnect Prediction Workshop (SLIP), Jun 2017.
C107  H. Mahajan, T. Bradley, S. Pasricha, “Application of STPA to a lane keeping assist system”, Workshop on Systems Approach to Safety and Security (STPA/STAMP), 2017.
C106 V. K. Kukkala, T. Bradley, S. Pasricha, “Uncertainty Analysis and Propagation for an Auxiliary Power Module,” IEEE Transportation and Electrification Conference (TEC), 2017.
C105 D. Dauwe, S. Pasricha, A. A. Maciejewski, H. J. Siegel, “An Analysis of Resilience Techniques for Exascale Computing Platforms,” 19th Workshop on Advances in Parallel and Distributed Computational Models (APDCM), co-organized with IEEE International Parallel and Distributed Processing Symposium (IPDPS), May 2017.
C104 D. Machovec, S. Pasricha, A. A. Maciejewski, H. Jay Siegel, G. A. Koenig, M. Wright, M. Hilton, R. Rambharos, T. Naughton, N. Imam, “Preemptive Resource Management for Dynamically Arriving Tasks in an Oversubscribed Heterogeneous Computing System,” IEEE International Heterogeneity in Computing Workshop (HCW),  co-organized with IEEE International Parallel and Distributed Processing Symposium (IPDPS), May 2017.
C103 S. Maiti, S. Pasricha, “DELCA: DVFS Efficient Low Cost Multicore Architecture,” ACM Great Lakes Symposium on VLSI (GLSVLSI) , May 2017.
C102 D. Dang, S. V. R. Chittamuru, R. N. Mahapatra, S. Pasricha, “Islands of Heaters: A Novel Thermal Management Framework for Photonic NoCs,” IEEE/ACM Asia & South Pacific Design Automation Conference (ASPDAC), Jan 2017.
C101 I. Thakkar, S. Pasricha, “DyPhase: A Dynamic Phase Change Memory Architecture with Symmetric Write Latency,” IEEE International Conference on VLSI Design (VLSID), Jan 2017.
C100 Y. Biran, S. Pasricha, G. Collins, J. Dubow, “Enabling Green Content Distribution Network by Cloud Orchestration,” 3rd IEEE Smart Cloud Networks & Systems Conference, Dec 2016. (Best Paper Award Candidate)
C99 D. Dauwe, S. Pasricha, A. A. Maciejewski, H. J. Siegel, “A Performance and Energy Comparison of Fault Tolerence Techniques for Exascale Computing Systems,” 6th IEEE International Symposium on Cloud and Service Computing (SC-2), Dec 2016.
C98 V. Y. Raparti, S. Pasricha, “CHARM: A Checkpoint-based Resource Management Framework for Reliable Multicore Computing in the Dark Silicon Era,” IEEE International Conference on Computer Design (ICCD), Oct 2016.
C97 I. Thakkar, S. V. R. Chittamuru, S. Pasricha, “Mitigation of Homodyne Crosstalk Noise in Silicon Photonic NoC Architectures with Tunable Decoupling,” ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Oct 2016.
C96 V. Y. Raparti, S. Pasricha, “A Cross-Layer Runtime Framework for Checkpoint-based Soft-Error and Aging Management in SoCs,” SRC Techcon, Sep 2016.
C95 M. Oxley, S. Pasricha, T. Maciejewski, H.J. Siegel and P. Burns, “Online Resource Management in Thermal and Energy Constrained Heterogeneous High Performance Computing,” IEEE International Conference on Big Data Intelligence and Computing (DataCom), Aug 2016.
C94 I. Thakkar, S. V. R. Chittamuru, S. Pasricha, “A Comparative Analysis of Front-End and Back-End Compatible Silicon Photonic On-Chip Interconnects,” ACM/IEEE System Level Interconnect Prediction Workshop (SLIP), Jun 2016. (Best Paper Award)
C93 I. Thakkar, S. V. R. Chittamuru, S. Pasricha, “Run-Time Laser Power Management in Photonic NoCs with On-Chip Semiconductor Optical Amplifiers,” IEEE/ACM International Symposium on Networks-on-Chip (NOCS), Aug 2016.
C92 D. Machovec, B. Khemka, S. Pasricha, A. A. Maciejewski, H. Jay Siegel, G. A. Koenig, M. Wright, M. Hilton, R. Rambharos, N. Imam, “Dynamic Resource Management for Parallel Tasks in an Oversubscribed Energy-Constrained Heterogeneous Environment,” International Heterogeneity in Computing Workshop (HCW) co-located with IEEE International Parallel & Distributed Processing Symposium IPDPS, May 2016.
C91 S. V. R. Chittamuru, I. Thakkar, S. Pasricha, “PICO: Mitigating Heterodyne Crosstalk Due to Process Variations and Intermodulation Effects in Photonic NoCs ,” IEEE/ACM Design Automation Conference (DAC), Jun. 2016.
C90 V. Y. Raparti, S. Pasricha, “Memory-Aware Circuit Overlay NoCs for Latency Optimized GPGPU Architectures,” IEEE International Symposium on Quality Electronic Design (ISQED), Mar. 2016.
C89 S. V. R. Chittamuru, I. Thakkar, S. Pasricha, “Process Variation Aware Crosstalk Mitigation for DWDM based Photonic NoC Architectures,” IEEE International Symposium on Quality Electronic Design (ISQED), Mar. 2016. (Best Paper Award Candidate)
C88 P. Pande, S. Pasricha, H, Matsutani, “The Future of NoCs: New Technologies and Architectures,” IEEE International Conference on VLSI Design (VLSID), Jan 2016.
C87 I. Thakkar, S. Pasricha, “Massed Refresh: An Energy-Efficient Technique to Reduce Refresh Overhead in Hybrid Memory Cube Architectures,” IEEE International Conference on VLSI Design (VLSID), Jan 2016.
C86 S. V. R. Chittamuru, S. Pasricha, “SPECTRA: A Framework for Thermal Reliability Management in Silicon-Photonic Networks-on-Chip,” IEEE International Conference on VLSI Design (VLSI), Jan 2016.
C85 E. Jonardi, M. Oxley, S. Pasricha, H. J. Siegel and T. Maciejewski, “Energy Cost Optimization for Geographically Distributed Heterogeneous Data Centers,” IEEE Workshop on Energy-efficient Networks of Computers (E2NC): from the Chip to the Cloud, Dec 2015. 
C84 S. Pasricha, “Integrated Photonics in Future Multicore Computing: New Directions in Dependability and Power Efficiency,” IEEE Second Workshop on Low-Power Dependable Computing (LPDC), Dec 2015. (Invited Keynote Paper)
C83 I. Thakkar, S. Pasricha, “A Novel 3D Graphics DRAM Architecture for High-Performance and Low-Energy Memory Accesses,” IEEE International Conference on Computer Design (ICCD), Oct 2015. 
C82 V. K. Kukkala, T. Bradley, S. Pasricha, “Priority-based Multi-level Monitoring of Signal Integrity in a Distributed Powertrain Control System,” 4th IFAC Workshop on Engine and Powertrain Control, Simulation and Modeling, Jul 2015. (Invited) 
C81 S. Pasricha, V. Ugave, Q. Han and C. Anderson, “LearnLoc: A Framework for Smart Indoor Localization with Embedded Mobile Devices,” ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Oct 2015.
C80 N. Kapadia, V. Y. Raparti, S. Pasricha, “ARTEMIS: An Aging-Aware Run-Time Application Mapping Framework for 3D NoC based Chip Multiprocessors,” IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 2015. 
C79 B. Khemka, R. Friese, S. Pasricha, A. A. Maciejewski, H. J. Siegel, G. A. Koenig, S. Powers, M. Hilton, R. Rambharos, M. Wright, S. Poole, “Comparison of Energy-Constrained Resource Allocation Heuristics Under Different Task Management Environments,” International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA), 2015. 
C78 S. Maiti, N. Kapadia, S. Pasricha, “Process Variation Aware Dynamic Power Management in Multicore Systems with Extended Range Voltage/Frequency Scaling,” IEEE MWSCAS 2015. 
C77 S. V. R. Chittamuru, S. Pasricha, “Improving Crosstalk Resilience with Wavelength Spacing in Photonic Crossbar-based Network-on-Chip Architectures,” IEEE MWSCAS 2015. 
C76 N. Kapadia, S. Pasricha, “Process-Variation and Soft-Error Reliability-Aware Workload Mapping with Adaptive Parallelism in SoCs ,” SRC Techcon, 2015. 
C75 D. Dauwe, E. Jonardi, R. Friese, S. Pasricha, A. A. Maciejewski, D. Bader, H.J. Siegel, “A Methodology for Co-Location Aware Application Performance Modeling in Multicore Computing,” 17th Workshop on Workshop on Advances in Parallel and Distributed Computational Models (APDCM), May 2015.  
C74 S. V. R. Chittamuru, S. Desai, S. Pasricha, “A Reconfigurable Silicon-Photonic Network with Improved Channel Sharing for Multicore Architectures,” ACM GLSVLSI, May 2015. (Best Paper Award)
C73 N. Kapadia, S. Pasricha, “VARSHA: Variation and Reliability-Aware Application Scheduling with Adaptive Parallelism in the Dark-Silicon Era,” IEEE/ACM Design Automation & Test in Europe (DATE), Mar 2015. 
C72 S. Pasricha, I. Thakkar, “Re-architecting DRAM memory systems with 3D Integration and Photonic Interfaces”, Memory Architecture and Organization Workshop (MeAOW), Oct 2014 (Invited)
C71 N. Kapadia, S. Pasricha, “PRATHAM: A Power Delivery-Aware and Thermal-Aware Mapping Framework for Parallel Embedded Applications on 3D MPSoCs,” IEEE International Conference on Computer Design (ICCD), Oct 2014 
C70 I. Thakkar, S. Pasricha, “3D-Wiz: A Novel High Bandwidth, Optically Interfaced 3D DRAM Architecture with Reduced Random Access Time,” IEEE International Conference on Computer Design (ICCD), Oct 2014. 
C69 Y. Zou, S. Pasricha, “HEFT: A Hybrid System-Level Framework for Enabling Energy-Efficient Fault-Tolerance in NoC based MPSoCs,” ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Oct 2014.
C68 Y. Xiang, S. Pasricha, “Fault-Aware Application Scheduling in Low Power Embedded Systems with Energy Harvesting,” ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Oct 2014. 
C67 M. Oxley, E. Jonardi, S. Pasricha, A. A. Maciejewski, G. Koenig and H. J. Siegel “Thermal, Power, and Co-location Aware Resource Allocation in Heterogeneous Computing Systems,” IEEE International Green Computing Conference (IGCC), 2014.
C66 D. Dauwe, R. Friese, S. Pasricha, A. A. Maciejewski, G. A. Koenig, H. J. Siegel, ” Modeling the Effects on Power and Performance from Memory Interference of Co-located Applications in Multicore Systems,” International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA), 2014.
C65 H. J. Siegel, B. Khemka, R. Friese, S. Pasricha, A. A. Maciejewski,  G. A. Koenig, S. Powers, M. Hilton, J. Rambharos, G. Okonski, and  S. W. Poole, “Energy-Aware Resource Management for Computing Systems,” 7th International Conference on Contemporary Computing (IC3), Noida, India, Aug. 2014. 
C64 B. Khemka, G. A. Koenigz, R, Friese, S. Powers, S. Pasricha, A. A. Maciejewski, M. Hilton, R. Rambharos, H. J. Siegel, S. Poole, “Utility Driven Dynamic Resource Management in an Oversubscribed Energy-Constrained Heterogeneous System”, 23rd International Heterogeneity in Computing Workshop (HCW), May 2014.  
C63 Y. Xiang, S. Pasricha, “A Hybrid Framework for Application Allocation and Scheduling in Multicore Systems with Energy Harvesting”, ACM Great Lakes Symposium on VLSI (GLSVLSI), May. 2014.
C62 D. Jaramillo, V. Ugave, R. Smart, S. Pasricha, “A Secure Cross-Platform Hybrid Mobile Enterprise Voice Agent,” IEEE SoutheastCon, Mar 2014. 
C61 S. Bahirat, S. Pasricha, “HELIX: Design and Synthesis of Hybrid Nanophotonic Application-Specific Network-On-Chip Architectures”, IEEE International Symposium on Quality Electronic Design (ISQED), Mar. 2014. 
C60 T. Pimpalkhute, S. Pasricha, “An Application-Aware Heterogeneous Prioritization Framework for NoC based Chip Multiprocessors”, IEEE International Symposium on Quality Electronic Design (ISQED), Mar. 2014. 
C59 S. Bahirat, S. Pasricha, “3D HELIX: Design and Synthesis of Hybrid Nanophotonic Application-Specific 3D Network-On-Chip Architectures, Workshop on Exploiting Silicon Photonics for Energy efficient Heterogeneous Parallel Architectures (SiPhotonics), Jan. 2014. 
C58 T. Pimpalkhute, S. Pasricha, “NoC Scheduling for Improved Application-Aware and Memory-Aware Transfers in Multi-Core Systems”, IEEE International Conference on VLSI Design (VLSID), Jan. 2014. 
C57 N. Kapadia, S. Pasricha, “Process Variation Aware Synthesis of Application-Specific MPSoCs to Maximize Yield”, IEEE International Conference on VLSI Design (VLSID), Jan. 2014.
C56 M. Oxley, S. Pasricha, H. J. Siegel, and A. Maciejewski, “Energy and Deadline Constrained Robust Stochastic Static Resource Allocation”, Workshop on Power and Energy Aspects of Computation (PEAC) held in conjunction with the 10th International Conference on Parallel Processing  and Applied Mathematics (PPAM), Sep. 2013. 
C55 R. Friese, T. Brinks, C. Oliver, A. Maciejewski, H. J. Siegel, S. Pasricha, “A Machine-by-Machine Analysis of a Bi-Objective Resource Allocation Problem”, International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA), Jul. 2013. 
C54 D. Young, J. Smith, S. Pasricha, A. Maciejewski and H. J. Siegel, “Heterogeneous Energy and Makespan Constrained DAG Scheduling”, International Workshop on Energy Efficient High Performance Parallel and Distributed Computing (EEHPDC), Jun. 2013. 
C53 Y. Xiang, S. Pasricha, “Harvesting-Aware Energy Management for Multicore Platforms with Hybrid Energy Storage”, ACM Great Lakes Symposium on VLSI  (GLSVLSI), May 2013. 
C52 N. Kapadia, S. Pasricha, “A Co-Synthesis Methodology for Power Delivery and Data Interconnection Networks in 3D ICs”, IEEE International Symposium on Quality Electronic Design (ISQED), Mar. 2013. 
C51 N. Kapadia, S. Pasricha, “VERVE: A Framework for Variation-Aware Energy Efficient Synthesis of NoC-based MPSoCs with Voltage Islands”, IEEE International Symposium on Quality Electronic Design (ISQED), Mar. 2013. 
C50 Y. Zou, S. Pasricha, “Reliability-Aware and Energy-Efficient Synthesis  of NoC based MPSoCs”, IEEE International Symposium on Quality Electronic Design (ISQED), Mar. 2013. 
C49 Y. Xiang, S. Pasricha, “Thermal-Aware Semi-Dynamic Power Management for Multicore Systems with Energy Harvesting”, IEEE International Symposium on Quality Electronic Design (ISQED), Mar. 2013. 
C48 M. Salas, S. Pasricha, “The Roce-Bush Router: A Case for Routing-centric Dimensional Decomposition for Low-latency 3D NoC Routers”, ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Oct 2012. 
C47 A. M. Al-Qawasmeh, S. Pasricha, A. M. Maciejewski, and H. J. Siegel, “Thermal-Aware Performance Optimization in Power Constrained Heterogeneous Data Centers”, 21st International Heterogeneity in Computing Workshop (HCW), 2012.  
C46 B. Donohoo, C. Ohlsen, S. Pasricha, C. Anderson, “Exploiting Spatiotemporal and Device Contexts for Energy-Efficient Mobile Embedded Systems”, IEEE/ACM Design Automation Conference (DAC), Jul. 2012. 
C45 S. Bahirat, S. Pasricha, “A Particle Swarm Optimization Approach for Synthesizing Application-specific Hybrid Photonic Networks-on-Chip”, IEEE International Symposium on Quality Electronic Design (ISQED), Mar. 2012.  
C44 N. Kapadia, S. Pasricha, “A Power Delivery Network Aware Framework for Synthesis of 3D Networks-on-Chip with Multiple Voltage Islands”, IEEE International Conference on VLSI Design (VLSID), Jan. 2012.
C43 S. Pasricha, “A Framework for TSV Serialization-aware Synthesis of Application Specific 3D Networks-on-Chip”, IEEE International Conference on VLSI Design (VLSID), Jan. 2012.
C42 Y. Zou, Y. Xiang, S. Pasricha, “Analysis of On-chip Interconnection Network Interface Reliability in Multicore Systems”, IEEE International Conference on Computer Design (ICCD), Oct. 2011. 
C41 B. Donohoo, C. Ohlsen, S. Pasricha, “AURA: An Application and User Interaction Aware Middleware Framework for Energy Optimization in Mobile Devices”, IEEE International Conference on Computer Design (ICCD), Oct. 2011. 
C40 D. Young, J. Apodaca, L. Briceno, J. Smith, S. Pasricha, A. Maciejewski, H. Siegel, S. Bahirat, B. Khemka, A. Ramirez and Y. Zou, “Energy-Constrained Dynamic Resource Allocation in a Heterogeneous Computing Environment”, Fourth International Workshop on Parallel Programming Models and Systems Software for High-End Computing (P2S2), Sep 2011. 
C39 J. Apodaca, D. Young, L. Briceno, J. Smith, S. Pasricha, A. Maciejewski, H. Siegel, S. Bahirat, B. Khemka, A. Ramirez and Y. Zou, “Stochastically Robust Static Resource Allocation for Energy Minimization with a Makespan Constraint in a Heterogeneous Computing Environment”, ACS/IEEE International Conference on Computer Systems and Applications (AICCSA), Dec 2011. (Best Paper Award) 
C38 N. Kapadia, S. Pasricha, “VISION: A Framework for Voltage Island Aware Synthesis of Interconnection Networks-on-Chip”, ACM Great Lakes Symposium on VLSI (GLSVLSI), Lausanne, Switzerland, May 2011. 
C37 S. Pasricha, Y. Zou, “A Low Overhead Fault Tolerant Routing Scheme for 3D Networks-on-Chip“, IEEE International Symposium on Quality Electronic Design (ISQED) , Santa Clara, CA, Mar 2011 
C36 S. Kwon, S. Pasricha, “POSEIDON: A Framework for Application-Specific Network-on-Chip Synthesis for Heterogeneous Chip Multiprocessors“, IEEE International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, Mar 2011 
C35 S. Pasricha, Y. Zou, “NS-FTR: A Fault Tolerant Routing Scheme for Networks on Chip with Permanent and Runtime Intermittent Faults“, IEEE/ACM Asia & South Pacific Design Automation Conference (ASPDAC), Yokohama, Japan, Jan 2011 
C34 S. Pasricha, S. Bahirat, “OPAL: A Multi-Layer Hybrid Photonic NoC for 3D ICs“, IEEE/ACM Asia & South Pacific Design Automation Conference (ASPDAC), Yokohama, Japan, Jan 2011 
C33 S. Pasricha, Y. Zou, D. Connors, H. J. Siegel, “OE+IOE: A Novel Turn Model Based Fault Tolerant Routing Scheme for Networks-on-Chip“, Proc. IEEE/ACM  International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS),Scottsdale, AZ, Oct 2010 
C32 S. Pasricha, “Carbon Nanotube Global Interconnects for Emerging Chip Multiprocessors”, 21st Annual Workshop on Interconnections within High Speed Digital Systems (HSD), Santa Fe, New Mexico, May 2010 (Invited)
C31 S. Bahirat, S. Pasricha, “UC-PHOTON: A Novel Hybrid Photonic Network-on-Chip for Multiple Use-Case Applications“, IEEE International Symposium on Quality Electronic Design (ISQED) Santa Clara, CA, Mar 2010 (Best Paper Award) 
C30 L. A. D. Bathen, Y. Ahn, S. Pasricha, N.  Dutt, “A Methodology for Power-aware Pipelining via High-Level Performance Model Evaluations“, IEEE International Workshop on Microprocessor Test and Verification  (MTV), Austin, TX, Dec 2009 
C29 L. A. D. Bathen, Y. Ahn, N.  Dutt, S. Pasricha, “Inter-kernel Data Reuse and Pipelining on Chip-Multiprocessors for Multimedia Applications“, IEEE Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia) Grenoble, France, Oct 2009 
C28 S. Bahirat, S. Pasricha, “Exploring Hybrid Photonic Networks-on-Chip for Emerging Chip Multiprocessors“, IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Grenoble, France, Oct 2009 
C27 S. Pasricha, “Exploring Serial Vertical Interconnects for 3D ICs“, IEEE/ACM Design Automation Conference (DAC 2009), San Francisco, CA, Jul 2009 
C26 R. Kost, D. Connors, S. Pasricha, “Characterizing the Use of Program Vulnerability Factors for Studying Transient Fault Tolerance in Multi-core Architectures”, Workshop on Compiler and Architectural Techniques for Application Reliability and Security (CATARS) Estoril, Portugal, Jun 2009  
C25 A. Gupta, S. Pasricha, N. Dutt, F. Kurdahi, K. Khouri, M. Abadir, “On-Chip Communication Architecture Based Thermal Management for SoCs“, IEEE VLSI Design, Automation & Test (VLSI-DAT), Hsinchu, Taiwan, Apr 2009 
C24 S. Pasricha, N. Dutt, F. Kurdahi, “Dynamically Reconfigurable On-Chip Communication Architectures for Multi Use-Case Chip Multiprocessor Applications“, IEEE/ACM Asia & South Pacific Design Automation Conference (ASPDAC), Yokohama, Japan, Jan 2009 
C23 S. Pasricha, F. Kurdahi, N. Dutt, “Exploring Carbon Nanotube Bundle Global Interconnects for Chip Multiprocessor Applications“, IEEE VLSI Design Conference (VLSID), New Delhi, India, Jan 2009 
C22 L. A. D. Bathen, N.  Dutt, S. Pasricha, “A Framework for Memory-aware Multimedia Application Mapping on Chip-Multiprocessors“,IEEE Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia), Atlanta, GA, Oct 2008
C21 Y. Park, S. Pasricha, F. Kurdahi, N. Dutt, “Methodology for Multi-Granularity Embedded Processor Power Model Generation for an ESL Design Flow”, IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Atlanta, GA, Oct 2008
C20 S. Pasricha, F. Kurdahi, N. Dutt, “System Level Performance Analysis of Carbon Nanotube Global Interconnects for Emerging Chip Multiprocessors”, IEEE/ACM International Symposium on Nanoscale Architectures, (NanoArch), Anaheim, CA,  Jun 2008
C19 H. Homayoun, S. Pasricha, M. Makhzan, A. Veidenbaum, “Dynamic Register File Resizing to Improve Embedded Processor Performance and Energy-delay Efficiency”, IEEE/ACM Design and Automation Conference (DAC), Anaheim, CA, Jun 2008 
C18 D. Cho, S. Pasricha, I. Issenin, N. Dutt and Y. Paek, “Compiler Driven Data Layout Optimization for Regular/Irregular Array Access Patterns”, ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems (LCTES), Tucson, AZ, Jun 2008 
C17 H. Homayoun, S. Pasricha, M. Makhzan, A. Veidenbaum, “Improving Performance and Reducing Energy-Delay with Adaptive Resource Resizing for Out-of-Order Embedded Processors”, ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems (LCTES), Tucson, AZ, Jun 2008
C16 S. Pasricha, Y. Park, S. Pasricha, Y. Park, F. Kurdahi, N. Dutt, “Incorporating PVT Variations in System-level Power Exploration of On-Chip Communication Architectures”, IEEE VLSI Design Conference (VLSID), Bangalore, IndiaJan 2008
C15 S. Pasricha, N. Dutt, “ORB: An On-chip Optical Ring Bus Communication Architecture for Multi-Processor Systems-on-Chip“, IEEE Asia & South Pacific Design Automation Conference (ASPDAC)Seoul, KoreaJan 2008
C14 Y. Park, S. Pasricha, F. Kurdahi, N. Dutt, “System Level Power Estimation Methodology with H.264 Decoder Prediction IP Case Study“, IEEE International Conference on Computer Design (ICCD 2007), Great Lakes, CA, Oct 2007
C13 S. Pasricha, N. Dutt, “On-chip Communication Architecture Synthesis for High Performance MPSoCs”, SRC TechConnect, Nov 2007
C12 S. Pasricha, Y. Park, F. Kurdahi, N. Dutt, “System-Level Power-Performance Trade-Offs in Bus Matrix Communication Architecture Synthesis”, IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Seoul, KoreaOct 2006 
C11 G. Madl, S. Pasricha, Q. Zhu, L. Bathen, N. Dutt, “Formal Performance Evaluation of AMBA-based System-on-Chip Designs“, 6th Annual ACM Conference on Embedded Software (EMSOFT)Seoul, Korea, Oct 2006 
C10 S. Pasricha, N. Dutt, “COSMECA: Application Specific Co-Synthesis of Memory and Communication Architectures for MPSoC“, IEEE/ACM Design Automation and Test in Europe Conference (DATE), Munich, Germany, Mar 2006 
C9 S. Pasricha, N. Dutt,  M. Ben-Romdhane, “Constraint-Driven Bus Matrix Synthesis for MPSoC“, IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), Yokohama, Japan, Jan 2006 (Best Paper Award) 
C8 S. Pasricha, N. Dutt,  M. Ben-Romdhane, “Using TLM for Exploring Bus-based SoC Communication Architectures“, IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Samos, Greece, Jul 2005 (Invited Paper) 
C7 S. Pasricha, N. Dutt, E. Bozorgzadeh, M. Ben-Romdhane, “Floorplan-aware Automated Synthesis of Bus-based Communication Architectures“, IEEE/ACM Design and Automation Conference (DAC), Anaheim, CA, Jun 2005 (Best Paper Candidate) 
C6 S. Pasricha, N. Dutt,  M. Ben-Romdhane, “Automated Throughput-driven Synthesis of Bus-based Communication Architectures“, IEEE Asia and South Pacific Design Automation Conference (ASPDAC), Shanghai, ChinaJan 2005 
C5 S. Pasricha, N. Dutt,  M. Ben-Romdhane, “Fast Exploration of Bus-based On-chip Communication Architectures“, IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Stockholm, Sweden, Sep 2004 
C4 S. Pasricha, N. Dutt,  M. Ben-Romdhane, “Extending the Transaction Level Modeling Approach for Fast Communication Architecture Exploration“, IEEE Design and Automation Conference (DAC), San Diego, CA, Jun 2004 
C3 S. Pasricha, S. Mohapatra, M. Luthra, N. Dutt, N. Subramanian, “Reducing Backlight Power Consumption for Streaming Video Applications on Mobile Handheld Devices, IEEE Embedded Systems for Real-Time Multimedia (ESTIMedia)Newport Beach, CA, Oct 2003 
C2 S. Pasricha, A. Veidenbaum, “Improving Branch Prediction Accuracy in Embedded Processors in the Presence of Context SwitchesIEEE International Conference on Computer Design (ICCD), San Jose, CA, Oct 2003 
C1 S. PasrichaTransaction Level Modeling of SoC with SystemC 2.0” Synopsys User Group Conference (SNUG), Bangalore, May 2002 

Books Chapters

BC40 J. Dey, S. Pasricha, “Machine Learning Based Perception Architecture Design for Semi-autonomous Vehicles”, Machine Learning and Optimization Techniques for Automotive Cyber-Physical Systems, Springer Nature, 2023
BC39 J. Dey, S. Pasricha, “Sensing Optimization in Automotive Platforms”, Machine Learning and Optimization Techniques for Automotive Cyber-Physical Systems, Springer Nature, 2023
BC38 A. Balasubramaniam, S. Pasricha, “Object Detection in Autonomous Cyber-Physical Vehicle Platforms: Status and Open Challenges”, Machine Learning and Optimization Techniques for Automotive Cyber-Physical Systems, Springer Nature, 2023
BC37 S. V. Thiruloga, V. Kukkala, S. Pasricha, “Deep AI for Anomaly Detection in Automotive Cyber-Physical Systems”, Machine Learning and Optimization Techniques for Automotive Cyber-Physical Systems, Springer Nature, 2023
BC36 V. Kukkala, S. V. Thiruloga, S. Pasricha, “Stacked LSTM Based Anomaly Detection in Time-Critical Automotive Networks”, Machine Learning and Optimization Techniques for Automotive Cyber-Physical Systems, Springer Nature, 2023
BC35 V. Kukkala, S. V. Thiruloga, S. Pasricha, “Real-Time Intrusion Detection in Automotive Cyber-Physical Systems with Recurrent Autoencoders”, Machine Learning and Optimization Techniques for Automotive Cyber-Physical Systems, Springer Nature, 2023
BC34 V. Kukkala, T. H. Bradley, S. Pasricha, “Security-Aware Design of Time-Critical Automotive Cyber-Physical Systems”, Machine Learning and Optimization Techniques for Automotive Cyber-Physical Systems, Springer Nature, 2023
BC33 V. Kukkala, T. H. Bradley, S. Pasricha, “Reliable Real-Time Message Scheduling in Automotive Cyber-Physical Systems”, Machine Learning and Optimization Techniques for Automotive Cyber-Physical Systems, Springer Nature, 2023
BC32 S. Tiku, S. Pasricha, “Enabling Security for Fingerprinting-Based Indoor Localization on Mobile Devices”, Machine Learning for Indoor Localization and Navigation, Springer Nature, 2023
BC31 S. Tiku, P. Kale, S. Pasricha, “Toward Real-Time Indoor Localization with Smartphones with Conditional Deep Learning”, Machine Learning for Indoor Localization and Navigation, Springer Nature, 2023
BC30 S. Tiku, L. Wang, S. Pasricha, “Exploring Model Compression for Deep Machine Learning-Based Indoor Localization”, Machine Learning for Indoor Localization and Navigation, Springer Nature, 2023
BC29 Y. Yang, S. Tiku, M. R. Azimi-Sadjadi, S. Pasricha, “A Manifold-Based Method for Long-Term Indoor Positioning Using WiFi Fingerprinting”, Machine Learning for Indoor Localization and Navigation, Springer Nature, 2023
BC28 S. Tiku, S. Pasricha, “A Few-Shot Contrastive Learning Framework for Long-Term Indoor Localization”, Machine Learning for Indoor Localization and Navigation, Springer Nature, 2023
BC27 D. Gufran, S. Tiku, S. Pasricha, “Heterogeneous Device Resilient Indoor Localization Using Vision Transformer Neural Networks”, Machine Learning for Indoor Localization and Navigation, Springer Nature, 2023
BC26 S. Tiku, D. Gufran, S. Pasricha, “Smartphone Invariant Indoor Localization Using Multi-head Attention Neural Network”, Machine Learning for Indoor Localization and Navigation, Springer Nature, 2023
BC25 S. Tiku, S. Pasricha, “A Portable Indoor Localization Framework for Smartphone Heterogeneity Resilience”, Machine Learning for Indoor Localization and Navigation, Springer Nature, 2023
BC24 S. Tiku, A. Mittal, S. Pasricha, “A Scalable Framework for Indoor Localization Using Convolutional Neural Networks”, Machine Learning for Indoor Localization and Navigation, Springer Nature, 2023
BC23 S. Tiku, S. Pasricha, “An Overview of Indoor Localization Techniques”, Machine Learning for Indoor Localization and Navigation, Springer Nature, 2023
BC22 A. Khune, S. Pasricha, “Reinforcement Learning for Energy Efficient Cloud Offloading of Mobile Embedded Applications,” Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing, Springer Nature, 2023
BC21 V. Kukkala, S. V. Thiruloga, S. Pasricha, “Machine Learning for Anomaly Detection in Automotive Cyber-Physical Systems,” Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing, Springer Nature, 2023
BC20 S. Tiku, S. Pasricha, “Secure Indoor Localization on Embedded Devices with Machine Learning,” Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing, Springer Nature, 2023
BC19 S. Tiku, S. Pasricha, “Convolutional Neural Networks for Efficient Indoor Navigation with Smartphones,” Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing, Springer Nature, 2023.
BC18 S. Tiku, L. Wang, S. Pasricha, “Machine Learning Model Compression for Efficient Indoor Localization on Embedded Platforms,” Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing, Springer Nature, 2023.
BC17 J. Dey, S. Pasricha, “Machine Learning for Efficient Perception in Automotive Cyber-Physical Systems,” Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing, Springer Nature, 2023.
BC16 F. Sunny, A. Mirza, I. Thakkar, M. Nikdast, S. Pasricha, “Photonic NoCs for Energy-Efficient Data-Centric Computing,” Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing, Springer Nature, 2023.
BC15 F. Sunny, A. Mirza, M. Nikdast, S. Pasricha, “Light Speed Machine Learning Inference on the Edge,” Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing, Springer Nature, 2023.
BC14 F. Sunny, M. Nikdast, S. Pasricha, “Design of Sparsity Optimized Photonic Deep Learning Accelerators,” Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing, Springer Nature, 2023
BC13 F. Sunny, A. Mirza, M. Nikdast, S. Pasricha, “Co-designing Photonic Accelerators for Machine Learning on the Edge,” Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing, Springer Nature, 2023.
BC12 V. K. Kukkala, S. V. Thiruloga, and S. Pasricha, “AI for Cybersecurity in Distributed Automotive IoT Systems”, Electronic Design for AI, IoT and Hardware Security, Springer, 2023.
BC11 F. Sunny, A. Mirza, M. Nikdast, S. Pasricha, “High Performance Deep Learning Acceleration with Silicon Photonics,” Silicon Photonics for High Performance Computing and Beyond, CRC Press/Taylor & Francis Group,  2021
BC10 F. Sunny, A. Mirza, I. Thakkar, S. Pasricha, M. Nikdast, “Improving Energy Efficiency in Silicon Photonic Networks-on-Chip with Approximation Techniques,” Silicon Photonics for High Performance Computing and Beyond, CRC Press/Taylor & Francis Group,  2021
BC9 I. G. Thakkar, S. V. R. Chittamuru, V. Bhat, S. S. Vatsavai, S. Pasricha, “Securing Silicon Photonic NoCs Against Hardware Attacks”, Springer Book on Network-on-Chip Security and Privacy,  2021
BC8 V. Y. Raparti, S. Pasricha, “Securing 3D NoCs from Hardware Trojan Attacks”, Springer Book on Network-on-Chip Security and Privacy,  2021
BC7 I. Thakkar, S. V. R. Chittamuru, V. Bhat, S. S. Vatsavai, S. Pasricha, “Hardware Security in Emerging Photonic Network-on-Chip Architectures,” Silicon Photonics for High Performance Computing and Beyond, Springer Book on Emerging Computing,  June 2020.
BC6 I. Thakkar, S. Pasricha, V. S. P. Karempudi, S. V. R. Chittamuru, “Exploring Aging Effects in Photonic Interconnects for High-Performance Manycore Architectures,” Silicon Photonics for High Performance Computing and Beyond, CRC Press/Taylor & Francis Group,  December 2019.
BC5 S. Pasricha, “Network and Communication Signals for Indoor Navigation”, 21st Century PNT, Wiley Publishers, 2019.
BC4 S. Pasricha, S. V. R. Chittamuru, I. Thakkar, “’Enhancing Process Variation Resilience in Photonic NoC Architectures’”, Optical Interconnects for Computer Systems, River Publishers, 2017.
BC3 N. Kapadia, S. Pasricha, “Robust Application Scheduling with Adaptive Parallelism in Dark-Silicon Constrained Multicore Systems”, The Dark Side of Silicon (Computing in the Dark Silicon Era), Springer, 2017.
BC2 S. Pasricha, Y. Zou, “Hybrid Partially Adaptive Fault Tolerant Routing for 3D Networks-on-Chip”, Embedded Systems: Hardware, Design, and Implementation, (ed K. Iniewski), John Wiley & Sons, Inc., Hoboken, NJ, USA. doi: 10.1002/9781118468654.ch10, Nov 2012.
BC1 S. Pasricha, N. Dutt, “On-chip optical ring bus communication architecture for heterogeneous MPSoC”, Integrated Optical Interconnect Architectures for Embedded Systems, I. O’Connor and G. Nicolescu (eds.), DOI 10.1007/978-1-4419-6193-8_5, Nov 2012.

Conference Tutorials

TU6 S. Pasricha, “Silicon Nanophotonics for Future Manycore Chips: Opportunities and Challenges” Half day tutorial at IEEE VLSI Design Conference (VLSID), Pune, India, Jan 2018.
TU5 A. T-Sanial, S. Pasricha, P. Pande, K. Chakrabarty, “3D Integration: Quo Vadis?” Full day tutorial at IEEE Design Automation and Test in Europe Conference, (DATE), Mar 2017.
TU4 S. Pasricha, N. Dutt, L. Benini, “On-Chip Communication Architectures: Buses, Networks-on-Chip, and Beyond ”, Full day tutorial at 41st IEEE/ACM International Symposium on Microarchitecture (MICRO), Lake Como, Italy, Nov 2008
TU3 S. Pasricha, K. Lahiri, and N. Dutt, “Modeling, Analysis and Design of Bus-based SOC Communication Architectures”, Half day tutorial at IEEE Design Automation and Test in Europe, (DATE), Nice, France, Apr 2007
TU2 S. Pasricha, K. Banerjee, L. Benini, K. Lahiri and N. Dutt, “SoC Communication Architectures: Technology, Current Practice, Research and Trends”, Full day tutorial at IEEE VLSI Design Conference (VLSID), Bangalore, India, Jan 2007
TU1 S. Pasricha, N. Dutt, “SoC Communication Architectures: Current Practice, Research and Trends”, Half day tutorial at the Asia and South Pacific Design Automation Conference (ASPDAC), Yokohama, Japan, Jan 2006