Graduate Exam Abstract

Abstract: The rapid growth of artificial intelligence (AI) applications—from autonomous systems and healthcare to cybersecurity and language modeling—has driven a demand for highly efficient and scalable hardware accelerators. As AI models such as large language models (LLMs) and graph neural networks (GNNs) grow in complexity and size, traditional digital platforms (CPUs, GPUs, TPUs, and standard electronic neural network accelerators) increasingly fall short due to power inefficiencies, memory bottlenecks, and scaling limitations in the post-Moore’s Law era. To address these challenges, this thesis explores robust and energy-efficient AI acceleration using novel hardware technologies and computing paradigms. Specifically, we investigate silicon-photonic and in-DRAM computing architectures, which offer promising throughput and power efficiency through optical computations and processing-in-memory (PIM). We also explore stochastic, analog, and digital computing paradigms to identify optimal tradeoffs between energy efficiency, accuracy, and hardware reliability. Through hardware-software co-design, this thesis presents architectural, circuit and device-level innovations that improve robustness against fabrication-induced variation, thermal crosstalk, and data integrity threats, paving the way for next-generation robust AI hardware systems.

Adviser: Sudeep Pasricha
Co-Adviser: N/A
Non-ECE Member: Yashwant Malaiya, CS
Member 3: Biswajit Ray, ECE
Addional Members: Anura Jayasumana, ECE

Publications:
- S. Afifi, O. Alo, I. Thakkar, S. Pasricha, “ASTRA: A Stochastic Transformer Neural Network Accelerator with Silicon Photonics”, Submitted to ESWEEK, 2026.
- S. Afifi, I. Thakkar, S. Pasricha, “SafeLight: Enhancing Security in Optical Convolutional Neural Network Accelerators”, IEEE/ACM DATE, 2025.
- S. Afifi, F. Sunny, M. Nikdast, S. Pasricha, “Accelerating Neural Networks for Large Language Models and Graph Processing with Silicon Photonics”, IEEE/ACM DATE, 2024.
- S. Afifi, I. Thakkar, S. Pasricha, “ARTEMIS: A Mixed Analog-Stochastic In-DRAM Accelerator for Transformer Neural Networks”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems / IEEE/ACM CASES (ESWEEK), 2024.
- S. Afifi, I. Thakkar, S. Pasricha, “STAR: A Mixed Analog Stochastic In-DRAM Convolutional Neural Network Accelerator”, IEEE Design & Test, 2024.
- S. Afifi, F. Sunny, A. Shafiee, M. Nikdast, S. Pasricha, “GHOST: A Graph Neural Network Accelerator using Silicon Photonics”, ACM Transactions on Embedded Computing Systems (TECS) / IEEE/ACM CASES (ESWEEK), 2023.
- S. Afifi, S. Pasricha, M. Nikdast, “Shedding Light on LLMs: Harnessing Photonic Neural Networks for Accelerating LLMs”, IEEE ICCAD, Nov 2024.
- S. Afifi, F. Sunny, M. Nikdast, S. Pasricha, “TRON: Transformer Neural Network Acceleration with Non-Coherent Silicon Photonics”, ACM GLSVLSI, 2023.
- T. Suresh, S. Afifi, S. Pasricha, “PhotoGAN: Generative Adversarial Neural Network Acceleration with Silicon Photonics” IEEE ISQED, 2025.

Program of Study:
ECE561
ECE580C6
ECE799
ECE554
ECE571
ECE528
ECE544
ECE545