Give

Graduate Exam Abstract


Yong Zou

Ph.D. Preliminary
December 16, 2013, 10:00AM-12:00
ECE Conference Room
Reliability-aware and energy-efficient system level design for networks-on-chip

Abstract: In this presentation, I will first discuss my
completed research on fault-tolerant design for
networks-on-chip with consideration of energy
overhead and performance. I will then discuss my
current work on reliability aware synthesis of
networks-on-chip. I will conclude by discussing my
future directions to finish my research.


Adviser: Sudeep Pasricha
Co-Adviser: N/A
Non-ECE Member: Wim Bohm, CS
Member 3: Anura Jayasumana, ECE
Addional Members: Tom Chen, ECE

Publications:
S. Pasricha, Y. Zou, “Hybrid Partially Adaptive Fault Tolerant Routing for 3D Networks-on-Chip”, to appear, Topics in Embedded Systems, edited by CRC Press, 2012
Y. Zou, Y. Xiang, S. Pasricha, “Characterizing Vulnerability of Network Interfaces in Embedded Chip Multiprocessors”, IEEE Embedded System Letters, 4(2), Jun 2012
Y. Zou, S. Pasricha, "NARCO: Neighbor Aware Turn Model Based Fault Tolerant Routing for NoCs", IEEE Embedded System Letters, Vol. 2, No. 3, Sep 2010
Y. Zou, S. Pasricha, “Reliability-Aware and Energy-Efficient Synthesis of NoC based MPSoCs”, IEEE International Symposium on Quality Electronic Design (ISQED 2013), Mar. 2013
Y. Zou, Y. Xiang, S. Pasricha, “Analysis of On-chip Interconnection Network Interface Reliability in Multicore Systems”, IEEE International Conference on Computer Design (ICCD), Oct. 2011
S. Pasricha, Y. Zou, "A Low Overhead Fault Tolerant Routing Scheme for 3D Networks-on-Chip", IEEE International Symposium on Quality Electronic Design (ISQED 2011) , Santa Clara, CA, Mar 2011
S. Pasricha, Y. Zou, "NS-FTR: A Fault Tolerant Routing Scheme for Networks on Chip with Permanent and Runtime Intermittent Faults", IEEE/ACM Asia & South Pacific Design Automation Conference (ASPDAC), Yokohama, Japan, Jan 2011
S. Pasricha, Y. Zou, D. Connors, H. J. Siegel, "OE+IOE: A Novel Turn Model Based Fault Tolerant Routing Scheme for Networks-on-Chip", Proc. IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS),Scottsdale, AZ, Oct 2010


Program of Study:
ECE 561
ECE 674
MATH 510
STAT 520
ECE 799
ECE 661
N/A
N/A