Abstract: High-Speed Vertical-Cavity Surface-Emitting Lasers with Reduced Electrical and Thermal Constraints on Modulation Bandwidth
The need for communication network services has increased the need for high-speed communication systems with greater bandwidth. One of the approaches to
greater local area network (LAN) link bandwidth is faster single-channel modulation rates. Because vertical-cavity surface-emitting lasers (VCSELs) are widely used in
shortwave length LAN transmitters, it is important to reduce the electrical and thermal constraints on their modulation bandwidth.
In this study high-speed oxide-confined VCSELs were fabricated and characterized. Complete fabrication processes for top-emitting self-aligned and non-selfaligned
850nm and 980nm high-speed VCSELs were developed. A complete fabrication process for bottom-emitting, non-self-aligned, flip-chip bonded 980nm highspeed
VCSELs was developed. Some of the critical fabrication steps that affect the VCSELs speed were examined. The effect of a heat-sinking layer on the
performance of high-speed VCSELs was demonstrated for 850nm and 980nm devices.
Two generations of devices were designed, fabricated and characterized in this research; the second generation incorporated modifications based on the first
generation fabrication and characterization results. In the first generation, self-aligned top-emitting 850nm high-speed VCSELs were fabricated and characterized. The
self-aligned process allowed smaller mesa diameters for a given aperture size, thus decreasing the distance for heat flow to the sidewall as well as mesa capacitance.
VCSEL mesa capacitance was reduced by 49% compared to values reported before. The effect of a heat-sinking layer on the 850nm VCSELs performance was
demonstrated. Au-wrapped and Cu-plated heat- spreading layers reduced the thermal resistance by 25% and 44%, respectively, and the output power was increased by
17% and 38%, respectively, compared to similar VCSELs without the Cu-plated heatsink. The fabricated devices exhibited a 3dB modulation frequency bandwidth up to
16.3 GHz at 8.9kA/cm2. Using the second generation design and fabrication process, an improved heat-sinking effect on the performance of high-speed non-self-aligned
850nm VCSELs was demonstrated. A 10µm active diameter device exhibited a reduced thermal resistance by 57% and 52% for Au-wrapped and Cu-plated devices,
respectively, compared to polyimide wrapped devices. The lasers exhibited modulation bandwidths up to approximately 18 GHz at only 8kA/cm2 and a MCEF as high
The effect of a heat-sinking layer on the performance of high-speed, non-self-aligned top-emitting 980 nm VCSELs was also demonstrated. Increasing Cu-plated
heatsink radii from 0µm to 4µm greater than the mesa in 980nm VCSELs reduced the measured thermal to values 50% lower than previously reported for top-emitting
VCSELs over a range of device sizes. For a 9µm diameter oxide aperture, the 4µm heatsink increased output power and modulation bandwidth by 131% and 40%,
respectively. The functional dependence of thermal resistance on oxide aperture diameter indicates the importance of lateral heat flow to mesa sidewalls. The measured
3-dB modulation frequency bandwidth was 9.8 GHz at 10.5 kA/cm2.
Bottom-emitting non-self-aligned flip-chip bonded 980nm devices were also fabricated and characterized. VCSELs with 10µm active area have a threshold
current and a slope efficiency of 0.6mA and 88%, respectively. The flip-chip bonding increased the maximum output power for VCSELs by up to 25%. Based on the
relative power increase for different device sizes, as the devices active diameter gets smaller the vertical heat sinking provided by the flip-chip bonding is less efficient
and a lateral heat sinking mechanism needs to be introduced.
To further improve the understanding of current high-speed VCSEL performance restrictions, the effect of external heating on the VCSELs resonance frequency
and damping factor was examined for top-emitting, self-aligned 980nm VCSELs. Increasing the stage temperature reduced both the resonance frequency and the
damping factor, hence limiting the modulation bandwidth of VCSELs. The relationship between the damping and the resonance frequency squared revealed a maximum
intrinsic 3dB bandwidth of 24.7GHz. Furthermore, as the contacts of the self-aligned VCSELs go through annealing, etching, and oxidation, experiments using Ti-Pd-Ti-
Au-Ti-Pd and Ti-Ni-Ti-Ni metal systems were performed on samples with different treatments to investigate the effect of these processes on the specific contact
resistance. The later metal system exhibited a lower specific contact resistance compared to the former one.
To better model the high-speed devices and learn how to lower the parasitic capacitance associated with the high-speed VCSEL metal pads, the dielectric
properties of four different spin-on dielectrics were investigated. Thicker dielectrics result in lower parasitic pad capacitance but also higher losses. A circuit model for
the pad capacitance is obtained based on geometrical and physical considerations. It is concluded that the remaining un-etched mirror stack under the VCSEL pad has no
considerable contribution to the loss and that the physical origin of most of this equivalent resistance is in fact dielectric loss in the pad capacitor.
Adviser: Professor Kevin Lear Co-Adviser: Non-ECE Member: Professor James Sites, Physics Member 3: Professor George Collins, Electrical and Computer Engineering Addional Members: