Organizers: Rashmi Jha, University of Toledo and Swaroop Ghosh, University of South Florida
Description: This special session at IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) at Colorado State University, Ft. Collins, CO in 2015, will focus on discussing the emerging nanoelectronic logic and memory devices, and circuits and architectures based on emerging nanoelectronic devices. As well-known, conventional scaling of CMOS devices are approaching their fundamental limits which imposes serious challenges on cost vs. performance targets of future microprocessors and circuits. There has been increased interests over researching alternative ways of computing using emerging nanoelectronic devices to keep scaling alive. In synchronization with the device development, a significant body of research has been focused on using the unique characteristic of these devices into innovative circuits and architectures. Some examples of emerging memory devices include Resistive Random Access Memory (ReRAM), Memristor, Spin-Torque Transfer RAM (STTRAM), and Domain-Wall memory devices. While, the options for logic devices include Tunneling Field Effect Transistors (T-FET), graphene based FET, and 2-D materials based FET. From circuit and system standpoint, novel computational models and applications of these emerging technologies in signal processing, security and non-Boolean computations have been proposed. This session aims to create a platform where device, circuits, and architecture experts from academia, industry, and government labs can come together and discuss their research efforts in this area.
Organizer: Sudeep Pasricha, Colorado State University
Description: Network-on-chip (NoC) is an emerging paradigm for communications within large VLSI systems implemented on a single silicon chip. In a NoC system, modules such as processor cores, memories and specialized IP blocks exchange data using a network as a "public transportation" sub-system for the information traffic. A NoC is constructed from multiple point-to-point data links interconnected by switches (a.k.a. routers), such that messages can be relayed from any source module to any destination module over several links, by making routing decisions at the switches. NoCs have been shown to provide a viable and scalable alternative to traditional on-chip buses. Moreover, NoCs can reduce the complexity of designing wires for predictable speed, power, noise, reliability, etc., due to their regular, well controlled structure. Recent years have seen an enormous emphasis from academia and industry on novel NoC architectures, analysis, CAD optimization, and case studies. The purpose of this special session is to bring together diverse perspectives on the state-of-the-art in NoC design, exploration, and application-specific challenges
Organizer: Cheng Li, HP Labs
Description: The explosive growth of bandwidth needs from cloud computing and big data requires that communication data rate scales up to supply this demand. However, conventional electrical interconnects bottlenecks post limitations on the link efficiency, leading to high and eventually unaffordable power consumption at high frequency. One approach to address such bottlenecks is enabling more widespread use of optical interconnects and silicon photonics. Optical channel provides a potential interconnects solution with improved data transfer efficiency due to their flat channel loss over a wide frequency range and also relatively small crosstalk and electromagnetic noise. Silicon photonics is a particularly promising and applicable technology to enable tightly integrated optical interconnects and future photonic interconnect network architectures due to its small footprint, CMOS compatibility, and the potential for high bandwidth density. The proposed special session will include several tentative papers, covering the topics of photonic device modeling, design and fabrication, and CMOS transceiver circuits design for optical interconnects. The tentative speakers are from both the academia and industry. First, an accurate analytical model of silicon microring resonator is proposed by UCSB and HP Labs to enable the co-design of CMOS-VLSI and optical interconnect. The researchers of Texas A&M University will summarize their study of PAM-4 modulation on the silicon ring resonators. Similarly, a research group of Boise State University will propose a complete design approach for PAM-4 silicon photonics transmitter. In the topic of silicon photonics device design and fabrication, a hybrid silicon microring laser and a 64Gb/s distributed-driven PAM-4 MZI modulator, both from HP Lab, and an adaptively-tunable RF photonic filter from Texas A&M will be included. Finally, a 56Gb/s PAM-4 optical receiver front-end architecture with linear automatic gain control in 65nm CMOS will be reported. Below table summarizes the tentative speakers, affiliations, and paper titles
Organizers: Arjuna Madanayake, University of Akro and Changzhi Li, Texas Tech
Description: The exponential growth in the wireless sector has led to unprecedented expansion of wireless services, subscribers, networks and infrastructure. Explosive growth in this critical sector is causing electromagnetic spectrum to become an increasingly scarce natural resource. Continuously expanding networks has led to more and more frequency channels that were traditionally allotted to radar and national defense/public safety applications to now be repurposed towards commercial use for data and sensing applications. Cognitive radio (CR) partially solves the impending problem of spectral scarcity in the traditional frequency bands for communications and radar by allowing frequency re-use among licensed (primary) and unlicensed (secondary) users. Dynamic spectral access can be achieved using CR and agile radar systems. CR attempts to better exploit available bandwidth by increasing spectral utilization efficiency. The problem of increasing wireless network capacity, radar system reliability, and ability to achieve efficient and reliable RF sensing over multiple platforms is recognized by scientic entities such as the US National Science Foundation (NSF), Office of Naval Research (ONR), Air Force Office of Scientic Research, and DARPA. One example is the DARPA SSPARC Program, which explores coexistence of radar and cognitive radios. Other examples are the Enhancing Access to Radio Spectrum (EARS) Program by NSF . A third example is the 1000x Game proposed by NSF . The coexistence of data networks, persistent sensing platforms, radar and public safety systems is a key component of future wireless research as envisaged by NSF. In light of the above, the proposed session aims to bring together scientists working in the RF signal processing microwave circuits and systems area. The topics have been chosen to strike a balance between RF electronics, microwave circuits, analog CMOS IC and agile/tunable high-frequency circuits.