Lab Assignments

Assignments & Instructions:

• It is essential to read the assignment before the lab and be ready to begin when you come to the lab.
• Report is due in a week.
   

Week	Project Description
Jan 21 - Jan 27	Lab 0: Introduction  Creating an Engineering Network Account
Jan 28 - Feb 3	Lab 1: Introduction to Altera DE board and Quartus II Design Software       Lab 1 Circuit      Lab steps     DE0 manual The only difference between DE0, DE1 and DE2 implementation is the FPGA number and PIN assignments. (Quartus II) software instructions remain the same.
Feb 4 - Feb 10	Lab 2: Schematic Entry, Timing Diagrams and Functional Simulation using Quartus II
Feb 11 - Feb 17	Lab 3: Design, Simulation and Verification of Combinational Circuits
Feb 18 - Feb 24	Lab 4: Two's Complement Adder Subtractor Design
Feb 25 - Mar 3	Lab 5: The Arithmatic Logic Unit
Mar 4 - Mar 10	Lab 6: The Seven Segment Display
Mar 11 - Mar 17	Lab 7: BCD to Seven Segment Display
Mar 18- Mar 24	Lab 8: Accumulator Based Tally Unit
Mar 25 - Mar 31	Lab 9: Register Bank and Shift Registers
Apr 1 - Apr 7	Lab 10: Design of Counters
Apr 10 - Apr 18	Spring Break
Apr 19 - Apr 23	Lab 11: Encryption Unit
Apr 26 - Apr 30	Lab 12: Nanoprocessor
May 3 - May 7th	Lab 13: Verilog

• The lab assignments use Altera DE boards and Quartus II software, available in C207 Engr.

Downloads:

• Quartus II software is available for download and installation on your computer (See Quartus II Web Edition Software).
• The following links will be helpful:
• Guide to install Quartus 18.1
• Installing device drivers for DE board