Logic Synthesis From KISS Descriptions Using AutoLogicII

This section discusses state machine design using the KISS four-column truth-table format. The following is an example of a 4-bit up-down counter in a file fsm1.kis.

1. Write a file with a .kis extension like the one that follows:
   

   .i 1
   .o 4
   .inputs IN1
   .output CNT[3] CNT[2] CNT[1] CNT[0]
   .clock CLK
   .extreset rst
   0 s0 s3 0001
   1 s0 s1 0001
   0 s1 s0 0010
   1 s1 s2 0010
   0 s2 s1 0100
   1 s2 s3 0100
   0 s3 s2 1000
   1 s3 s0 1000
   .e
   

   Line 1 shows that there is 1 input, line 2 shows there are 4 outputs, lines 3 and 4 give they're names, line 5 names the clock and line 6 names an external reset signal rst. In the next 8 lines, the first column shows the input, column two is the present state, column three is the next state and the last column is the output for the present state. Notice that for this example, the output only depends on the state not the input so this is a Moore machine rather than a Mealy machine.

2. Make a directory eddm.
3. Start AutoLogic by typing alui.
4. After the AutoLogic II window opens, go to Setup in the pull down menu then Destination Technology and then xc4ke/default and OK.
5. At the command line inside AutoLogicII at the bottom, type:

   open design -kiss (entire path of your kiss file) -view work design_name kiss
   -option "-a spectral -m -e"
   

   Where 'design_name' is the cell name you want the synthesis tool to generate. In the option field, spectral can be replaced with onehot, gray, nova or mustang depending on which encoding technique you wish to choose.

6. In the pull down menu, go to Optimize then Optimize.... Make the settings:

   Optimization Type: Area
   Area Optimization Options: Medium
   Factor
   

7. Lastly, go to File in the pull down menu then Save and EDDM.

   Model Name: (leave blank)
   GN Library Mapping: work eddm
   select Generate Schematic
   

KIS synthesis creates a symbol but the pins will not be sorted. Go to the section on Schematic Capture to see how to create a symbol and to overwrite this one and add the ports and buffers to your design so that it can be downloaded to the Xilinx board. You will find the schematic sheet in the eddm directory.