Patents
- Patent No.
US11189196: Systems
and Methods for Palpation Training,
D. Hendrickson, G. J. Hendrickson, J.
L. Sullivan, A. P. Jayasumana, B.S.
Evans and Y. Feng, Issued Nov.
30, 2021 (Colorado State
University, CO).
- Patent No.
US6028995: Method of determining delay
in logic cell models, Mark Jetton and
Anura P. Jayasumana, Issued Feb. 22,
2000 (Assignee - LSI Logic Inc.).
- Patent No.
US5757816: IDDQ Testing of Integrated
Circuits, Waleed K. Al-Assadi, Anura
P. Jayasumana and Yashwant K. Malaiya,
Issued May. 26, 1998, (Assignee -
Advanced Micro Devices (AMD), Austin,
TX).
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