1ST Workshop on Electronic Design Automation and Machine Learning (EDAML), 2022

May 30, 2022
Co-located with 36th IEEE International Parallel and Distributed Processing Symposium
May 30 – June 3, 2022, Ecole Normale Supérieure de Lyon Lyon, France

Machine Learning (ML) has evolved substantially over the past decade and is now an integral component of many applications such as classification and object detection in images and video, speech recognition and language translation, data mining and pattern recognition, and cybersecurity. However, the design of server, edge, and embedded/IoT computing platforms to support these ML and other emerging applications remains a significant challenge. This workshop aims to explore the intersection of ML and electronic design automation (EDA) and define a roadmap to realize the next generation of parallel and distributed computing systems. Topics of interest to this workshop include but are not limited to:

  • ML for EDA physical design (layout, placement, routing, etc.)
  • ML for EDA with emerging technologies (photonics, ReRAM, quantum, etc.)
  • ML for test, verification, and validation
  • ML for resource, power, and thermal management in manycore computing
  • Hardware/software co-design with ML
  • ML for electronic chip security and reliability
  • ML for analog and mixed-signal design
  • ML accelerator design for next generation parallel and distributed systems
  • EDA for ML and AI Systems (also covering tinyML and EdgeAI)

Program Chairs: Muhammad Shafique (muhammad.shafique@nyu.edu), Sudeep Pasricha (sudeep@colostate.edu)