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Debugging

Debugging a VHDL program is similar to debugging any other program. The same two methods of attack, diagnostic printouts and interactive debugging, are used. Diagnostic printouts are performed using the ASSERT statement. This statement provides several classes of output:

Interactive debugging of a VHDL program is carried out entirely in the simulator in an environment similar to graphical interface symbolic debuggers. The primary features of the simulator used for debugging are:

Break points can be inserted by clicking on Source under View pull-down menu, then click on any line numbers in the text window. A red dot will appear if a break point is successfully inserted at the line. Step and Step Over are two buttons in the interface window.
next up previous
Next: A VHDL example Up: VHDL Previous: Compilation and Simulation

Geun Rae Cho
Tue Aug 24 19:15:12 MDT 1999