LAB SCHEDULE FOR EE450
Newest Update Here: No Update, 08/27/09
WEEK |
Lab Content |
|
date from - date to |
1 |
Introduction to
EE451 tools-Cadence.
|
2 weeks lab |
-------------------------------- |
3 |
1 week lab |
09/10/2009-09/14/2009 |
|
4 |
1 week lab |
09/17/2009-09/21/2009 |
|
5 |
1 week lab |
09/24/2009-09/28/2009 |
|
6 |
1 week lab |
10/01/2009-10/05/2009 |
|
7 |
|
1 of 2week lab |
10/08/2009-10/12/2009 |
8 |
|
2 of 2 |
10/15/2009-10/19/2009 |
9 |
1 week lab |
10/22/2009-10/26/2009 |
|
10 |
|
1 week lab |
10/29/2009-11/02/2009 |
11 |
|
1 of 2 week lab |
11/05/2009-11/09/2009 |
12 |
|
2 of 2 |
11/12/2009-11/16/2009 |
|
*** Thanksgiving break *** |
|
|
13 |
|
Extension for completion of Lab 8 |
11/26/2009-11/30/2009 |
14 |
Lab 9:
Design of a Complex Finite State Machine (Verilog part ONLY) |
1 week lab |
12/03/2009-12/07/2009 |
15 |
Demo Lab 9 |
|
12/10/2009-12/14/2009 |
In order to receive credit for the lab section, the pre-work is to be completed prior to commencement of lab and that each lab needs to be demonstrated to the TA during the week the lab is scheduled. A lab report is due at the end of each lab before starting the next lab. Each lab report must contain:
* Thanksgiving break.
** To be able to turn in overdue labs, arrangements must be made with the TA Wei Wei.
Modified by: Wei Wei