ECE Seminar Series
Title: Enabling Efficient and Reliable Edge Computing: From Device to Architecture
Speaker: Arman Roohi
Affiliation: University of Texas at Austin
Day: Wednesday, March 25, 2020
Time: 11:00 am - 12:00 pm
Location: Video Conference
Abstract: Benefits of alternatives to von-Neumann architectures for emerging applications such as neuromorphic computing and Internet-of-Thing (IoT) include avoidance of the processor-memory bottleneck, reduced energy consumption, and area-sparing computation. Viable solutions to the challenge of designing these emerging computing systems span the interrelated fields of machine learning, computer architecture, and the potential to leverage the complementary characteristics of emerging device technologies. This talk covers two of the most significant applications, including energy harvesting systems and big data processing.
Energy-harvesting-powered computing offers intriguing and vast opportunities to transform the landscape of IoT devices dramatically. These devices require drastically reduced energy consumption such that they can operate using only ambient sources of light, thermal, etc. If lightweight embedded computing could be realized with free and/or inexhaustible sources of energy, new classes of maintenance-free, compact, and inexpensive computing applications would become possible. As a new foundational computing approaches to operate within the energy constraints, it is proposed to innovate Intermittent-Robust Computation (IRC) leveraging the non-volatility inherent in post-CMOS switching devices. The foundations of IRC are advanced from the ground up by extending Spintronics device models to realize reconfigurable gates logic approaches and libraries, that leverage intrinsic-non-volatility to realize middleware-coherent, intermittent computation without checkpointing, or micro-tasking and energy overheads vital to IoT. The synthesis and optimization procedures, as design methodology, instantiate the developed library cells within standard Register Transfer Language specifications to generate power-failure resilient VLSI implementations. Another highly used application is deep Convolutional Neural Network (CNN), which has shown impressive performance for computer vision, e.g., image recognition tasks, achieving close to human-level perception rates. The ability of conventional computing platforms to support memory-oriented computing for processing large datasets is hindered due to exiting limitations either in the device, i.e., power wall, or architecture, i.e., memory wall. Moreover, the processing demands of high-depth CNNs spanning hundreds of layers face severe challenges in terms of memory and computation resources, which is crucial for resource-limited IoT nodes. This issue has been motivating the development of alternative approaches in both SW/HW domains to improve conventional CNN efficiency. Therefore, developing an optimized in-memory processing accelerator for convolutional layers via algorithm and hardware co-design approach will be discussed.
Bio: Arman Roohi is currently a postdoctoral research fellow in UT Design Automation Laboratory at the University of Texas at Austin. He received the Ph.D. degree in Computer Engineering at the University of Central Florida, Orlando, FL, USA, in 2019. He also received his M.Sc. degree in Computer Architecture at the Department of Computer Engineering, Science and Research Branch of Azad University, Tehran, Iran, in 2011. He received his B.Sc. degree in Computer Engineering in 2008 from Shiraz (Pahlavi) University, Shiraz, Iran. His research interests span neuromorphic computing, deep learning hardware acceleration and deep learning security, reconfigurable and adaptive computer architectures, beyond CMOS computing, with emphasis on Spintronics. On these topics, he has completed over 38 publications including best paper recognition, book chapters, and STEM curricular development. He received Ph.D. Forum at DAC 2018 Scholarship, Frank Hubbard Engineering Endowed Scholarship in 2018, best paper recognitions in IEEE Transactions on Emerging Topics in Computing in 2019, and paper of the month at IEEE Transactions on Computers in 2017. He served as the Technical Program Committee Member of ICCD and GLSVLSI. He also served as a Technical Reviewer for over 30 international journals /conferences, such as IEEE TC, TVLSI, TCAD, TNANO, TCAS, DAC, and ISCAS. His research is sponsored by The National Science Foundation (NSF), Florida Center for Cybersecurity (FC2), etc.