Digital System Design (ECE450)

Lab 5

 

Logarithmic Multiplier (Cadence)

 

 

1. Objectives

The objective of this lab is to design complex arithmetic logic using Cadence.

2. Lab Description and Specs

Function:

Logarithmic multiplier performs multiplication of a pair of input numbers A and B by adding their logarithms as follows:


 
It converts a multiplication function to an addition function. The log and antilog operations can be performed by table lookup in Read Only Memory (ROM). A and B are 5-bit integer numbers. Choose a design that doesn’t require a ROM size that is feasible by manual design (say, no more than 64 entries). Based on range of A and B, you should also choose the location of the decimal point for the ROM output.

Inputs:

A, B: 5-bit inputs to the multiplier.

Outputs:

M: Output from the multiplier

F: Overflow flag

3.    Recommended Procedures

For this lab you should design the ROM (including decoding), carry look-ahead adder and the random logic part separately.

    1. Design a carry-lookahead adder for adding numbers from the ROM.
    2. Design a two ROMs, one for a log table and another for the antilog table lookup.
    3. Assemble the top level schematic in Cadence.
    4. Run Cadence to verify the functionality of the multiplier by applying combinations of inputs like those in the truth table.

4.     Prelab

a. Paper Schematic showing the entries (transistors) for the log and antilog ROM table(s) 
b. Paper Schematic of decoding logic for the ROM(s) 
c. Paper Schematic of the carry-lookahead adder 

5. Questions