Prelab

Review ROM based design of combinational circuits.
Complete the following:

• A truth table illustrating the relationship between [I7,...I0]  as inputs, and [X2, G2,...A2], [X1, G1, ....A1], [X0, G0,...A0] as outputs that drive the 3 7-segment displays for the following five input combinations:  [I7,...I0] =  0000 0000;   0000 1010;  0010 0100;  1000 1000;  1111 1111;
• Create a table that contains the address of the memory location [I7,...I0], and the contents [X2,G2,...X1,G1,...,X0,G0,...A0]of that specific location in hexadecimal form for the above five combinations.
• Complete the following Verilog tutorial. (approximately 1hr). It is required to register on Intel first which is free of cost.