Arithmetic Logic Unit is an integral part of almost any processor, subtraction, and multiplication are basic functions that are carried out in an ALU. we have studied the Adder/ subtractor in lab 3 and we will study a multiplier in this lab.

A multiplier multiplies two n-bit integers to produce a 2n-bit integer result.  A very simple micro controller may correspond to n = 4, while n may be 64, 128, or higher in processors used in personal computers. By now you realize that it would be extremely difficult to do the design using standard truth-table based techniques as the size of the table increases exponentially with n. While multiplication can be done by repeated addition, such a design suffers from high latency. Thus we explore a different approach for multiplier design.

For this project you will design a 4-bit by 4-bit  array multiplier. Array multipliers have  good performance and are  easy to design.
You will gain experience in array based designs, where the design is done using an array of identical components. Thus, scaling the design to larger sizes involve enlarging the array without having to redesign for new parameters. 

This is the most complex project you have undertaken to date, and you will find that careful planning is essential.