The Challenge

Now that you have gained respect at  Banana Electronics as a quick learner of the new digital logic software, Quartus II,  you have been assigned the tasks of designing and simulating the behavior and implementing two logic circuits.


    Part 1:

a.        Design a switching circuit that has four inputs (A, B, C, D) and three outputs ( F2, F1, F0), with outputs as follows:
     F2  = ABC'D'
     F1 =  ABC + A'B'C'D' + A'B'D+ A'CD' + AB'C' + A'CD + A'B'D
     F0  =  (A'B+AB')(CD+C'D') + (AB +A'B')(C'D+CD')

b.      Obtain the timing diagram using simulations and construct a truth table for the same

c.       Implement the circuit on the Altera board

d.      Obtain the truth table using your hardware output

e.       Identify the function of this circuit

f.       Demonstrate the circuit (at or before the next lab meeting). 
  

Part 2 (4-to-16 Decoder): 

a.        A decoder is a circuit that is widely used in digital design. A 4-to-16 decoder  has  four inputs (W,X,Y,Z) and sixteen outputs (F15, F14, F13, F12, F11, F10, F9, F8,F7, F6, F5, F4, F3, F2, F1, F0).
The inputs and outputs are related as follows:
    F15 =  WXYZ
    F14 =  WXYZ'
    F13 =  WXY'Z
    F12 =  WXY'Z'
    F11 =  WX'YZ
    F10 =  WX'YZ'
    F9 =  WX'Y'Z
    F8 =  WX'Y'Z'
    F7 =  W'XYZ
    F6 =  W'XYZ'
    F5 =  W'XY'Z
    F4 =  W'XY'Z'
    F3 =  W'X'YZ
    F2 =  W'X'YZ'
    F1 =  W'X'Y'Z
    F0 =  W'X'Y'Z'


b.       Obtain the timing diagram using simulations and construct a truth table from these input and output

c.        Implement the circuit on your Altera DE board

d.       Obtain the truth table using your hardware outputs

e.       Identify the function of this circuit (describe in your own words)

f.        Demonstrate the circuit (at or before the next lab meeting).




DESIGN CONSTRAINT:

     Use only AND, OR, and NOT gates in your designs
 

SIMULATION SPECIFICATIONS:

Circuit Schematic

Create simplified circuit schematics for the circuits.

Timing Diagram

Generate timing diagrams for all the circuits. All the requested simulations shall be clocked timing diagrams with properly correlated input signals.
 

REPORT

You will submit your work attached to a Memorandum which is addressed to your supervisor at Banana.  Go to the Preparing the Memo link to review the general requirements for Banana Memos or to the What to Include in Report #3 link for the specific things to include.