ECE 102 - Homework 7

Due  10/17/2017 

1. .A circuit has four inputs  PQRS and five outputs UVWYZ. PQRS represents a binary integer.
   UVW represents the quotient and YZ the remainder when PQRS is divided by 3 (UVW and YZ
   represent 3-bit and 2-bit binary numbers respectively).   Realize the circuit using
   a) a ROM
   b) a minimum two-level OR-AND
   c) a PLA (specify the PLA table).
   
   
2. Implement each of the following functions using using only two-input gates.
   The multi-level circuit should have AND and OR gates alternating at adjacent levels
   a) Z= AB+C'DE'
   b) X = ABC+AE +A'C'E'+A'D'F'  (last gate should be an AND gate)
   c) Part (b) with last gate as an OR gate
   
   
3.  Implement the BCD to seven-segment decoder (Lab 6) using a using a single decoder and OR gates only.
   
   
4.  Implement the functions F,G and H using a PLA (with minimum number of product terms).
    Specify the PLA table and draw the internal connections of the PLA using dots to indicate the presence of switching elements.
   F(A,B,C,D) = Σm(3,4,6,9,12)
   G(A,B,C,D) = Σm(2,4,8,10,12,13)
   H(A,B,C,D) = Σm(3,6,7,10,12)
   
   
5. Draw the PLA table for the following PLA. Write the minterm expansion for W, X.

1.