Design, implement, and test a multiplier that accepts two 4-bit binary integers as inputs and produces the product of the two numbers as its output.

Procedure:

The input variables are 4-bit binary numbers (A3,A2,A1,A0) and (B3,B2,B1,B0) generated using switches 0-3 and 4-7 on your DE-2 board: SW0 = A0,..., SW3 = A3, SW4=B0, ...SW7=B3. Result will be displayed using the LEDs of DE-2 board.
Write out the bit products (e.g., A0.B0, A0.B1, etc.) that have to be multiplied and added together and develop the array multiplier design using Full Adders and logic gates.
Using Quartus-II create the schematic, simulate and verify your implementation. Show results for at least 12 different input combinations.
Implement this hardware on your DE-2 Board and test it.
Strictly for extra credit [not required]: Design and test an 8 by 8 multiplier.

Additional (Required) Assignment: Banana Electronics' VP for Marketing wants to find out how fast the multiplier operates and also the feasibility of making larger multipliers. Estimate the maximum number of gates (longest chain) a signal has to propagate through in your 4x4 multiplier design. Assume that the delay through a logic gate is 15ns, estimate the maximum amount of time it would take the multiplier to do a multiplication. Estimate the number of gates of different types needed for array multipliers of size 4x4, 8x8 and 16x16.
Report these results in your Memo.

Report:
Prepare a memorandum which is addressed to the manager of the R&D group at Banana. Go to the Preparing the Memo link to review the general requirements for Banana Memos or to the What to Include and Grading Policy link for the specific things to include in the Project #5 report.