Publications

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R&D Tools Books Book Chapters
Refereed Journal Papers Refereed Conference Publications Refereed Poster Presentations
Guest Editorials IEEE Potential Articles Thesis

R&D Tools

RD3 CLAP: Crosstalk and Loss Analysis Platform for Optical Interconnects Download
RD2 OTEMP: Optical Thermal Effect Modeling Platform for Optical Interconnects (Contributed) Download
RD1 MCSL – Realistic Networks-on-Chip Traffic Patterns (Contributed) Download

Books

B1 M. Nikdast, G. Nicolescu, S. L. Beux, and J. (Editors), “Photonic interconnects for computing systems: Understanding and pushing design challenges,” River Publishers, 2017. (Book Flyer)

Book Chapters

BC2 M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “Impact of fabrication non-uniformity on silicon photonic networks-on-chip,” Photonic Interconnects for Computing Systems, River Publishers, Chapter 12, pp. 356-384, 2017.
BC1 F. Gohring, M. Nikdast, F. Hessel, O. Liboiron-Ladouceur, and G. Nicolescu, “Optical interconnection networks: the need for low-latency controllers,” Photonic Interconnects for Computing Systems, River Publishers, Chapter 3, pp. 73-106, 2017.

Refereed Journal Papers

J22 M. Bahadori, M. Nikdast, S. Rumley, L. Y. Dai, N. Janosik, T. V. Vaerenbergh, A. Gazman, Q. Cheng, R. Polster, and K. Bergman, “Design space exploration of microring resonators in silicon photonic interconnects: impact of the ring curvature,” IEEE Journal of Lightwave Technology, vol. 36, no. 13, pp. 2767-2782, July 2018.
J21 R. Ayari, M. Nikdast, I. Hafnaoui, G. Beltrame, and G. Nicolescu, “HypAp: a hypervolume-based approach for refining the design of embedded systems,” in IEEE Embedded Systems Letters, vol. 9, no. 3, pp. 57-60, September 2017.
J20 M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “Chip-scale silicon photonic interconnects: a formal study on fabrication non-uniformity,” in Journal of Lightwave Technology (JLT), vol. 34, no. 16, pp. 3682-3695, August 2016.
J19 L. H. K. Duong, Z. Wang, M. Nikdast, J. Xu, P. Yang, Zh. Wang, R. Maeda, H. Li, X. Wang, S. Le Beux, and Y. Thonnart, “Coherent and incoherent crosstalk noise analyses in inter/intra-chip optical interconnection networks,” in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 24, no. 7, pp. 2475- 2487, July 2016.
J18 F. Gohring, R. Priti, M. Nikdast, F. Hessel, O. Liboiron-Ladouceur, and G. Nicolescu, “Design and modelling of a low-latency centralized controller for optical integrated networks,” in IEEE Communications Letters (COMML), vol. 20, no. 3, pp. 462-465, March 2016. 
J17 M. Nikdast, J. Xu, X. Wu, X. Wang, Z. Wang, Zh. Wang, and P. Yang, “Crosstalk noise in WDM-based optical networks-on-chip: a formal study and comparison,” in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 23, no. 11, pp. 2552-2565, November 2015.
J16 X. Wu, J. Xu, Y. Ye, X. Wang, M. Nikdast, Z. Wang, and Zh. Wang, “An inter/intra-chip optical network for manycore processors,” in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol.23, no. 4, pp. 678-691, April 2015.
J15 X. Wang, J. Xu, W. Zhang, X. Wu, Y. Ye, Z. Wang, M. Nikdast, and Zh. Wang, “Actively alleviate power-gating-induced power/ground noise using parasitic capacitance of on-chip memories in MPSoCs,” in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 23, no. 2, pp. 266-279, February 2015.
J14 M. Nikdast, J. Xu, L. H. K. Duong, X. Wu, Z. Wang, X. Wang, and Zh. Wang, “Fat-tree-based optical interconnection networks under crosstalk noise constraint,” in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol.23, no.1, pp. 156-169, January 2015.
J13 Y. Ye, Z. Wang, J. Xu, X. Wu, X. Wang, M. Nikdast, Zh. Wang, and L. H. K. Duong, “System-level modeling and analysis of thermal effects in WDM-based optical networks-on-chip,” in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol.33, no. 11, pp. 1718-1731, November 2014.
J12 L. H. K. Duong, M. Nikdast, S. Le Beux, J. Xu, X. Wu, Z. Wang, P. Yang, “A case study of signal-to-noise ratio in ring-based optical networks-on-chip,” in IEEE Design and Test of Computers (D&T), vol.31, no. 5, pp. 55-65, October 2014.
J11 X. Wu, J. Xu, Y. Ye, Z. Wang, M. Nikdast, and X. Wang, “SUOR: sectioned undirectional optical ring for chip multiprocessor,” in ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 10, no. 4, pp. 1-25, June 2014. 
J10 Z. Wang, J. Xu, X. Wu, Y. Ye, W. Zhang, M. Nikdast, X. Wang, and Zh. Wang, “Floorplan optimization of fat-tree based networks-on-chip for chip multiprocessors,” in IEEE Transactions on Computers (TC), vol. 63, no. 6, pp. 1446-1459, June 2014.
J9 X. Wu, Y. Ye, J. Xu, W. Zhang, W. Liu, M. Nikdast, and X. Wang, “UNION: a unified inter/intra-chip optical network for chip multiprocessors,” in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 22, no. 5, pp. 1082-1095, May 2014.
J8 M. Nikdast, J. Xu, X. Wu, W. Zhang, Y. Ye, X. Wang, Z. Wang, and Zh. Wang, “Systematic analysis of crosstalk noise in folded-torus-based optical networkson-chip,” in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 33, no. 3, pp. 437-450, March 2014.
J7 W. Liu, X. Wang, J. Xu, W. Zhang, Y. Ye, X. Wu, M. Nikdast, and Z. Wang, “On-chip sensor networks for soft-error tolerant real-time multiprocessor systemson-chip,” in ACM Journal of Emerging Technologies in Computing Systems (JETC), vol. 10, no. 2, pp. 1-20, March 2014.
J6 Y. Xie, M. Nikdast, J. Xu, X. Wu, W. Zhang, Y. Ye, X. Wang, Z. Wang, and W. Liu, “Formal worst-case analysis of crosstalk noise in mesh-based optical networks-on-chip,” in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 21, no. 10, pp. 1823-1836, October 2013.
J5 Y. Ye, J. Xu, B. Huang, X. Wu, W. Zhang, X. Wang, M. Nikdast, Z. Wang, W. Liu, and Zh. Wang, “3D mesh-based optical network-on-chip for multiprocessor system-on-chip,” in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 32, no. 4, pp. 584-596, April 2013.
J4 Y. Ye, J. Xu, X. Wu, W. Zhang, X. Wang, M. Nikdast, Z. Wang, and W. Liu, “System-level modeling and analysis of thermal effects in optical networks-on-chip,” in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 21, no. 2, pp. 292-305, February 2013.
J3 Y. Ye, J. Xu, X. Wu, W. Zhang, W. Liu, and M. Nikdast, “A torus-based hierarchical optical-electronic network-on-chip for multiprocessor system-on-chip,” in ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 8, no. 1, pp. 1-26, February 2012. 
J2 S. Nasrolahi, M. Nikdast, and M. Mahdavi, “The semantic web: a new approach for future world wide web,” International Journal of Computer, Electrical, Automation, Control and Information Engineering, vol. 3, no. 10, pp. 2474-2479, October 2009. 
J1 A. M. Shafiee, M. Montazeri, and M. Nikdast, “An innovational intermittent routing algorithm in network-on-chip,” International Journal of Computer and Information Engineering, vol. 2, no. 9, pp. 2907-2909, September 2008. 

Refereed Conference Publications

C26 M. Nikdast, G. Nicolescu, and O. Liboiron-Ladouceur, “Improving Microresonator Reliability in Silicon Photonic Integrated Circuits,” IEEE Optical Interconnect (OI) Conference, Santa Fe, NM 2018, pp. 3-4.
C25 M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “DeEPeR: Enhancing Performance and Reliability in Chip-Scale Optical Interconnection Networks,” ACM Great Lakes Symposium on VLSI (GLSVLSI) Conference, Chicago, IL 2018, pp. 63-68(Best Paper Award Candidate/Finalist)
C24 F. Gohring, M. Nikdast, Y. Xiong, F. Hessel, O. Liboiron-Ladouceur, and G. Nicolescu, “Silicon photonic interconnects: minimizing the controller latency,” ACM Great Lakes Symposium on VLSI (GLSVLSI) Conference, Chicago, IL 2018, pp. 323-328. (Invited)
C23 M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “Enabling efficient tolerance analysis in silicon photonic integrated circuits,” Progress in Electromagnetic Research Symposium (PIERS), Shanghai, China, 2016, pp. 783-783. (Invited)
C22 M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “An analytical study of process variations in silicon photonic integrated circuits,” Photonics North (PN), Quebec City, Canada, 2016, pp. 1-2. (Invited)
C21
M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “Modeling fabrication non-uniformity in chip-scale silicon photonic interconnects,” Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, Germany, 2016, pp. 115-120. (Best Paper Award)
C20 M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “Photonic integrated circuits: A study on process variations,” Optical Fiber Communications Conference and Exhibition (OFC), Anaheim, USA, 2016, paper W2A.22.
C19 M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-ladouceur, “Silicon Photonic Integrated Circuits under Process Variations,” Asia Communications and Photonics Conference (ACP), Hong Kong, 2015, paper ASu2A.12. (Best Poster Paper Award)
C18 F. Gohring, R. Priti, M. Nikdast, F. Hessel, O. Liboiron-Ladouceur, and G. Nicolescu, “A low-latency centralized controller for MZI-based optical integrated networks,” International Conference on Photonics in Switching (PS), Florence, Italy, 2015, pp. 118-120.
C17 L. H. K. Duong, M. Nikdast, J. Xu, Z. Wang, Y. Thonnart, S. Le Beux, P. Yang, X. Wu, and Zh. Wang, “Coherent crosstalk noise analyses in ring-based optical interconnects,” Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France, 2015, pp. 501-506.
C16 M. Nikdast, L. H. K. Duong, J. Xu, S. Le Beux, X. Wu, Z. Wang, P. Yang, and Y. Ye, “CLAP: a crosstalk and loss analysis platform for optical interconnects,” IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Ferrara, Italy, 2014, pp. 172-173.
C15 Y. Ye, X. Wu, J. Xu, M. Nikdast, Z. Wang, and X. Wang, “System-level analysis of mesh-based hybrid optical-electronic network-on-chip,” IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 2013, pp. 321-324. (Invited)
C14 X. Wang, J. Xu, W. Zhang, X. Wu, Y. Ye, Z. Wang, M. Nikdast, and Zh. Wang, “Active power-gating-induced power/ground noise alleviation using parasitic capacitance of on-chip memories,” Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France, 2013, pp. 1221-1224.
C13 W. Liu, Z. Wang, X. Wu, J. Xu, B. Li, W. Zhang, Y. Ye, Zh. Wang, and M. Nikdast, “A network-on-chip benchmark suite based on real applications,” Workshop on SoCs, Heterogeneous Architectures and Workloads (SHAW-4), Collocated with HPCA, Shenzhen, China, 2013. (Invited)
C12 Y. Ye, X. Wu, J. Xu, W. Zhang, M. Nikdast, and X. Wang, “Holistic comparison of optical routers for chip multiprocessors,” Anti-counterfeiting, Security, and Identification (ASID), Taipei, Taiwan, 2012, pp. 1-5. (Invited)
C11 Y. Ye, J. Xu, X. Wu, W. Zhang, W. Liu, M. Nikdast, X. Wang, Z. Wang, and Zh. Wang, “Thermal analysis for 3D optical network-on-chip based on a novel low-cost 6×6 optical router,” Optical Interconnects Conference (OI), Santa Fe, USA, 2012, pp. 110-111.
C10 Z. Wang, J. Xu, X. Wu, Y. Ye, W. Zhang, W. Liu, M. Nikdast, X. Wang, and Zh. Wang, “A novel low-waveguide-crossing floorplan for fat tree based optical networks-on-chip,” Optical Interconnects Conference (OI), Santa Fe, USA, 2012, pp. 100-101.
C9 Y. Ye, J. Xu, X. Wu, W. Zhang, X. Wang, M. Nikdast, Z. Wang, and W. Liu, “Modeling and analysis of thermal effects in optical networks-on-chip,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Chennai, India, 2011, pp. 254-259.
C8 W. Liu, J. Xu, X. Wu, Y. Ye, X. Wang, W. Zhang, M. Nikdast, and Z. Wang, “A NoC traffic suite based on real applications,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Chennai, India, 2011, pp. 66-71.
C7 W. Liu, J. Xu, X. Wang, Y. Wang, W. Zhang, Y. Ye, X. Wu, M. Nikdast, and Z. Wang, “A hardware-software collaborated method for soft-error tolerant MPSoC,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Chennai, India, 2011, pp. 260-265.
C6 Y. Xie, M. Nikdast, J. Xu, W. Zhang, Q. Li, X. Wu, Y. Ye, W. Liu, and X. Wang, “Crosstalk noise and bit error rate analysis for optical networks-on-chip,” Design Automation Conference (DAC), Anaheim, USA, 2010, pp. 657-660.
C5 X. Wu, Y. Ye, W. Zhang, W. Liu, M. Nikdast, X. Wang, and J. Xu,”UNION: A unified inter/intra-chip optical network for chip multiprocessors,” IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch), Anaheim, USA, 2010, pp. 35-40.
C4 H. Ahmadi and M. Nikdast, “Age-based adaptive routing algorithm for network-on-chip,” Iranian Student Conference in Electrical Engineering (ISCEE), Iran, 2009. 
C3 M. Davarpanah, A. Mohamad Shafiee, M. Nikdast, and M. Montazeri, “A predetermined routing algorithm for network-on-chip,” Iranian Conference on Electrical Engineering (ICEE), Iran, 2009.
C2 A. M. Shafiee, M. Nikdast, and M. Montazeri, “Parameterized intermittent routing algorithm in networks-on-chip,” IEEE International Conference on Emerging Trends in Computing (ICETiC), India, 2009.
C1 B. Soleimani, E. Shahabian, M. yavari, and M. Nikdast, “A novel heuristic for solving the 8 puzzle problem based on IDA method,” Iranian Student Conference in Electrical Engineering (ICEE), Iran, 2008.

Refereed Poster Presentations

P11 M. Nikdast, G. Nicolescu, and O. Libiron-Ladouceur, “Fault-tolerant optical NoCs: an approach based on microresonator design space exploration,” Design Automation Conference (DAC) – Late Breaking Results (LBR), San Francisco, CA 2018. 
P10 M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Libiron-Ladouceur, “Chip-scale silicon photonic integrated circuits: a study on fabrication non-uniformity,” IEEE/OSA Montreal Networking Event and Poster Competition, Montreal, Canada, 2017.  
P9 M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Libiron-Ladouceur, “Silicon photonic interconnects: latest advances and current challenges,” Postdoctoral Research Day, Montreal, Canada, 2015.  
P8 M. Nikdast, “Optical Interconnects for Computing Systems: a Formal Study on Signal-to-Noise Ratio,“ Design, Automation and Test in Europe Conference and Exhibition (DATE), France, 2015. (Ph.D. Forum)
P7 M. Nikdast and J. Xu, “On the impact of crosstalk noise in optical networks-on-chip,” Design Automation Conference (DAC), San Francisco, USA, 2014. (Ph.D. Forum, Acceptance rate: 30%)
P6 Z. Wang, J. Xu, X. Wu, X. Wang, Zh. Wang, M. Nikdast, and P. Yang, “Holistic modeling and comparison of inter-chip optical and electrical interconnects,” Design Automation Conference (DAC), San Francisco, USA, 2014.
P5 W. Liu, J. Xu, X. Wu, Y. Ye, X. W., W. Zhang, M. Nikdast, and Z. Wang, “MCSL: a realistic traffic benchmark suite for network-on-chip studies,” Design Automation Conference (DAC), San Diego, USA, 2011.
P4 W. Liu, J. Xu, X. Wang, Y. Wang, W. Zhang, Y. Ye, X. Wu, M. Nikdast, and Z. Wang, “A low-overhead hardware-software collaborated approach for soft-error tolerance,” Design Automation Conference (DAC), San Diego, USA, 2011.
P3 M. Nikdast, J. Xu, X. Wu, Y. Ye, W. Liu, and X. Wang, “A formal analysis of crosstalk noise in mesh-based optical networks-on-chip for chip multiprocessors,” AMD Technical Forum and Exhibition (AMD-TFE), Taipei, Taiwan, 2010. (Best Project Award, Second place)
P2 W. Liu, X. Wang, J. Xu, X. Wu, Y. Ye, and M. Nikdast, “A case study of on-chip sensor networks for soft-error tolerant multiprocessor systems-on-chip,” AMD Technical Forum and Exhibition (AMD-TFE), Taipei, Taiwan, 2010. (Invited Poster)
P1 M. Nikdast and M. Montazeri, “Analysis of different routing algorithms in NoCs,” Iranian Student Conference in Electrical Engineering (ICEE), Iran, 2008.

Guest Editorials

GE1

IEEE Potential Articles

A3 M. Nikdast, “Research Papers: Writing Tips and Top-Tier Targets,” in IEEE Potentials, vol. 36, no. 3, pp. 26-29, May-June 2017.
A2 M. Nikdast, “Research Tips for Frist-Year Ph.D. Students,” in IEEE Potentials, vol. 35, no. 3, pp. 18-20, May-June 2016.
A1 Sh. Sinha and M. Nikdast, “Finding Happiness and Satisfaction during Your Ph.D. Program,” in IEEE Potentials, vol. 34, no. 3, pp. 36-38, May-June 2015.

Thesis

T1 M. Nikdast, “Signal-to-Noise Ratio in Optical Interconnection Networks: Analysis, Modeling, and Comparison,” Ph.D. Dissertation, The Hong Kong University of Science and Technology (HKUST), Hong Kong, December 2013.