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| R&D Tools | Books | Book Chapters |
| Refereed Journal Papers | Refereed Conference Publications | Refereed Poster Presentations |
| Guest Editorials | IEEE Potential Articles | Thesis |
R&D Tools
| RD3 | CLAP: Crosstalk and Loss Analysis Platform for Optical Interconnects | Download |
| RD2 | OTEMP: Optical Thermal Effect Modeling Platform for Optical Interconnects (Contributed) | Download |
| RD1 | MCSL – Realistic Networks-on-Chip Traffic Patterns (Contributed) | Download |
Books
| B2 | M. Nikdast, G. Nicolescu, S. Pasricha, A. Seyedi, and D. Ling (Editors), Silicon photonics for high-performance computing and beyond. Taylor and Francis Catalogue (CRC Press), November 2021, ISBN 9780367262143, 408 pp. (Book Flyer)
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| B1 | M. Nikdast, G. Nicolescu, S. L. Beux, and J. (Editors), Photonic interconnects for computing systems: Understanding and pushing design challenges. River Publishers, Wharton, TX, May 2017, ISBN 9788793519800, 412 pp. (Book Flyer)
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Book Chapters
| BC7 | A. Shafiee, S. Pasricha, and M. Nikdast, ‘Silicon photonics for future computing systems,” Wiley Encyclopedia of Electrical and Electronics Engineering, ISBN 9780471346081, 2022. |
| BC6 | M. Nikdast, S. Pasricha, G. Nicolescu, A. Seyedi, and D. Liang, “Editors’ Introduction: Silicon Photonics for High-Performance Computing and Beyond,” Silicon Photonics for High-Performance Computing and Beyond. Taylor and Francis Catalogue (CRC Press), November 2021, ISBN 9780367262143, pp. 9-15. |
| BC5 | F. Sunny, A. Mirza, S. Pasricha, and M. Nikdast, “High performance deep learning acceleration with silicon photonics,” Silicon Photonics for High-Performance Computing and Beyond. Taylor and Francis Catalogue (CRC Press), November 2021, ISBN 9780367262143, Chapter 19, pp. 367-382. |
| BC4 | F. Sunny, A. Mirza, I. Thakkar, S. Pasricha, and M. Nikdast, “Improving energy efficiency in silicon photonic networks-on-chip with approximation techniques,” Silicon Photonics for High-Performance Computing and Beyond. Taylor and Francis Catalogue (CRC Press), November 2021, ISBN 9780367262143, Chapter 8, pp. 127-141. |
| BC3 | M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “Impact of fabrication nonuniformity on silicon photonics networks-on-chip,” Photonic Interconnects for Computing Systems: Understanding and Pushing Design Challenges. River Publishers, Wharton, TX, May 2017, ISBN 9788793519800, Chapter 12, pp. 355–385. |
| BC2 | F. Gohring, M. Nikdast, F. Hessel, O. Liboiron-Ladouceur, and G. Nicolescu, “Optical interconnection networks: The need for low-latency controllers,” Photonic Interconnects for Computing Systems: Understanding and Pushing Design Challenges. River Publishers, Wharton, TX, May 2017, ISBN 9788793519800, Chapter 3, pp. 73–107. |
| BC1 | M. Nikdast, G. Nicolescu, S. Le Beux, and J. Xu, “Editor’s introduction: Photonics interconnects for computing systems: Understanding and pushing design challenges,” Photonic Interconnects for Computing Systems: Understanding and Pushing Design Challenges. River Publishers, Wharton, TX, May 2017, ISBN 9788793519800, pp. 1–8. |
Refereed Journal Papers
| J37 | A. Mirza, R. E. Gloekler, J. Thompson, S. Pasricha, and M. Nikdsast, “Experimental Analysis of Adiabatic Silicon Photonic Microring Resonators under Process Variations,” IEEE Photonics Technology Letters (PTL), 2024. |
| J36 | S. Afifi, F. Sunny, A. Shaifee, M. Nikdast, and S. Pasricha, “GHOST: A Graph Neural Network Accelerator using Silicon Photonics,” to appear, ACM Transactions on Embedded Computing Systems (TECS), 2023. |
| J35 | E. Taheri, R. G. Kim, and M. Nikdast, “AdEle+: An adaptive congestion-and-energy-aware elevator selection for partially connected 3D Networks-on-Chip,” to appear, IEEE Transactions on Computers (TC), 2023. |
| J34 | A. Shafiee, S. Pasricha, and M. Nikdast, “A survey on optical phase-change memory: The promise and challenges,” IEEE Access Journal, vol. 11, pp. 11781-11803, 2023. |
| J33 | S. Banerjee, M. Nikdast, S. Pasricha, and K. Chakrabarty, “Pruning Coherent Integrated Photonic Neural Networks,” to appear, IEEE Photonics Society (IPS) Journal of Selected Topics in Quantum Electronics (JSTQE), 2023. (Invited) |
| J32 | A. Mirza, A. Shafiee, S. Banerjee, K. Chakrabarty, S. Pasricha, and M. Nikdast, “Characterization and optimization of coherent MZI-based nanophotonic neural networks under fabrication non-uniformity,” IEEE Transactions on Nanotechnology (TNANO), vol. 21, pp. 763–771, 2022. |
| J31 | S. Banerjee, M. Nikdast, and K. Chakrabarty, “Characterizing coherent integrated photonic neural networks under imperfections,” IEEE/OSA Journal of Lightwave Technology (JLT), vol. 41, no. 5, pp. 1464-1479, 2023. |
| J30 | S. Banerjee, M. Nikdast, and K. Chakrabarty, “On the impact of uncertainties in silicon-photonic neural networks,” to appear, IEEE Design and Test of Computers (D&T), 2023. |
| J29 | A. Mirza, F. Sunny, P. Walsh, K. Hassan, S. Pasricha, and M. Nikdast, “Silicon photonic microring resonators: A comprehensive design-space exploration and optimization under fabrication-process variations,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 10, pp. 3359–3372, 2022. |
| J28 | V. S. P. Karempudi, F. Sunny, I. Thakkar, S. V. R. Chittamuru, M. Nikdast, and S. Pasricha, “Photonic networks-on-chip employing multilevel signaling: A cross-layer comparative study,” ACM Journal of Emerging Topics in Computing (JETC), vol. 18, no. 3, article no. 45, 2022. |
| J27 | F. Sunny, A. Mirza, M. Nikdast, and S. Pasricha, “ROBIN: A robust optical binary neural network Accelerator,” ACM Transactions on Embedded Computing Systems (TECS), vol. 20, no. 5s, Article no. 57, pp. 1–24, October 2021. |
| J26 | F. Sunny, A. Mirza, I. Thakkar, M. Nikdast, and S. Pasricha, “ARXON: A framework for approximate communication over photonic networks-on-chip,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 29, no. 6, pp. 1206-1219, June 2021. |
| J25 | F. Sunny, E. Taheri, M. Nikdast, S. Pasricha, “A survey on silicon photonics for deep learning,” ACM Journal of Emerging Technologies in Computing Systems (JETC), vol. 17, no. 4, article no. 61, pp. 1-57, July 2021. |
| J24 | S. Pasricha and M. Nikdast, “A survey of silicon photonics for energy efficient manycore computing,” IEEE Design and Test of Computers, vol. 37, no. 4, pp. 60-81, 2019. |
| J23 | M. Bahadori, M. Nikdast, Q. Cheng, and K. Bergman, “Universal design of waveguide bends in silicon-on-insulator photonics platform,” IEEE Journal of Lightwave Technology, vol. 37, no. 13, pp. 3044-3054, 2019. |
| J22 | M. Bahadori, M. Nikdast, S. Rumley, L. Y. Dai, N. Janosik, T. V. Vaerenbergh, A. Gazman, Q. Cheng, R. Polster, and K. Bergman, “Design space exploration of microring resonators in silicon photonic interconnects: Impact of the ring curvature,” IEEE Journal of Lightwave Technology, vol. 36, no. 13, pp. 2767-2782, July 2018. |
| J21 | R. Ayari, M. Nikdast, I. Hafnaoui, G. Beltrame, and G. Nicolescu, “HypAp: A hypervolume-based approach for refining the design of embedded systems,” IEEE Embedded Systems Letters, vol. 9, no. 3, pp. 57-60, September 2017. |
| J20 | M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “Chip-scale silicon photonic interconnects: A formal study on fabrication non-uniformity,” IEEE Journal of Lightwave Technology (JLT), vol. 34, no. 16, pp. 3682-3695, August 2016. |
| J19 | L. H. K. Duong, Z. Wang, M. Nikdast, J. Xu, P. Yang, Zh. Wang, R. Maeda, H. Li, X. Wang, S. Le Beux, and Y. Thonnart, “Coherent and incoherent crosstalk noise analyses in inter/intra-chip optical interconnection networks,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 24, no. 7, pp. 2475- 2487, July 2016. |
| J18 | F. Gohring, R. Priti, M. Nikdast, F. Hessel, O. Liboiron-Ladouceur, and G. Nicolescu, “Design and modelling of a low-latency centralized controller for optical integrated networks,” IEEE Communications Letters (COMML), vol. 20, no. 3, pp. 462-465, March 2016. |
| J17 | M. Nikdast, J. Xu, X. Wu, X. Wang, Z. Wang, Zh. Wang, and P. Yang, “Crosstalk noise in WDM-based optical networks-on-chip: A formal study and comparison,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 23, no. 11, pp. 2552-2565, November 2015. |
| J16 | X. Wu, J. Xu, Y. Ye, X. Wang, M. Nikdast, Z. Wang, and Zh. Wang, “An inter/intra-chip optical network for manycore processors,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol.23, no. 4, pp. 678-691, April 2015. |
| J15 | X. Wang, J. Xu, W. Zhang, X. Wu, Y. Ye, Z. Wang, M. Nikdast, and Zh. Wang, “Actively alleviate power-gating-induced power/ground noise using parasitic capacitance of on-chip memories in MPSoCs,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 23, no. 2, pp. 266-279, February 2015. |
| J14 | M. Nikdast, J. Xu, L. H. K. Duong, X. Wu, Z. Wang, X. Wang, and Zh. Wang, “Fat-tree-based optical interconnection networks under crosstalk noise constraint,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol.23, no.1, pp. 156-169, January 2015. |
| J13 | Y. Ye, Z. Wang, J. Xu, X. Wu, X. Wang, M. Nikdast, Zh. Wang, and L. H. K. Duong, “System-level modeling and analysis of thermal effects in WDM-based optical networks-on-chip,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol.33, no. 11, pp. 1718-1731, November 2014. |
| J12 | L. H. K. Duong, M. Nikdast, S. Le Beux, J. Xu, X. Wu, Z. Wang, P. Yang, “A case study of signal-to-noise ratio in ring-based optical networks-on-chip,” IEEE Design and Test of Computers (D&T), vol.31, no. 5, pp. 55-65, October 2014. |
| J11 | X. Wu, J. Xu, Y. Ye, Z. Wang, M. Nikdast, and X. Wang, “SUOR: sectioned undirectional optical ring for chip multiprocessor,” ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 10, no. 4, pp. 1-25, June 2014. |
| J10 | Z. Wang, J. Xu, X. Wu, Y. Ye, W. Zhang, M. Nikdast, X. Wang, and Zh. Wang, “Floorplan optimization of fat-tree based networks-on-chip for chip multiprocessors,” IEEE Transactions on Computers (TC), vol. 63, no. 6, pp. 1446-1459, June 2014. |
| J9 | X. Wu, Y. Ye, J. Xu, W. Zhang, W. Liu, M. Nikdast, and X. Wang, “UNION: a unified inter/intra-chip optical network for chip multiprocessors,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 22, no. 5, pp. 1082-1095, May 2014. |
| J8 | M. Nikdast, J. Xu, X. Wu, W. Zhang, Y. Ye, X. Wang, Z. Wang, and Zh. Wang, “Systematic analysis of crosstalk noise in folded-torus-based optical networks-on-chip,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 33, no. 3, pp. 437-450, March 2014. |
| J7 | W. Liu, X. Wang, J. Xu, W. Zhang, Y. Ye, X. Wu, M. Nikdast, and Z. Wang, “On-chip sensor networks for soft-error tolerant real-time multiprocessor systems-on-chip,” ACM Journal of Emerging Technologies in Computing Systems (JETC), vol. 10, no. 2, pp. 1-20, March 2014. |
| J6 | Y. Xie, M. Nikdast, J. Xu, X. Wu, W. Zhang, Y. Ye, X. Wang, Z. Wang, and W. Liu, “Formal worst-case analysis of crosstalk noise in mesh-based optical networks-on-chip,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 21, no. 10, pp. 1823-1836, October 2013. |
| J5 | Y. Ye, J. Xu, B. Huang, X. Wu, W. Zhang, X. Wang, M. Nikdast, Z. Wang, W. Liu, and Zh. Wang, “3D mesh-based optical network-on-chip for multiprocessor system-on-chip,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 32, no. 4, pp. 584-596, April 2013. |
| J4 | Y. Ye, J. Xu, X. Wu, W. Zhang, X. Wang, M. Nikdast, Z. Wang, and W. Liu, “System-level modeling and analysis of thermal effects in optical networks-on-chip,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 21, no. 2, pp. 292-305, February 2013. |
| J3 | Y. Ye, J. Xu, X. Wu, W. Zhang, W. Liu, and M. Nikdast, “A torus-based hierarchical optical-electronic network-on-chip for multiprocessor system-on-chip,” ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 8, no. 1, pp. 1-26, February 2012. |
| J2 | S. Nasrolahi, M. Nikdast, and M. Mahdavi, “The semantic web: a new approach for future world wide web,” International Journal of Computer, Electrical, Automation, Control and Information Engineering, vol. 3, no. 10, pp. 2474-2479, October 2009. |
| J1 | A. M. Shafiee, M. Montazeri, and M. Nikdast, “An innovational intermittent routing algorithm in network-on-chip,” International Journal of Computer and Information Engineering, vol. 2, no. 9, pp. 2907-2909, September 2008. |
Refereed Conference Publications
| C69 | M. Morsali, B. Reidy, D. Najafi, S. Tabrizchi, M. Imani, M. Nikdast, A. Roohi, R. Zand, and S. Angizi, “Lightator: An Optical Near-Sensor Accelerator with Compressive Acquisition Enabling Versatile Image Processing,” to appear, in Proc. IEEE/ACM Design Automation Conference (DAC), San Francisco, CA, June 2024. |
| C68 | M. A. Mahdian, E. Taheri, K. Rahbardar Mojaver, and M. Nikdast, “Photonic Physically Unclonable Functions using Ring-Assisted Contra-Directional Couplers,” to appear, in Proc. IEEE/Optica Optical Fiber Communication (OFC) Conference, San Diego, CA, March 2024. |
| C67 | F. Sunny, A. Shaifee, B. Charbonnier, M. Nikdast, and S. Pasricha, “COMET: A Cross-Layer Optimized Optical Phase Change Main Memory Architecture,” to appear, in Proc. IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, Valencia, Spain, March 2024. |
| C66 | M. Morsali, S. Tabrizchi, D. Najafi, M. Imani, M. Nikdast, A. Roohi, and S. Angizi, “OISA: Architecting an Optical In-Sensor Accelerator for Efficient Visual Computing,” to appear, in Proc. IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, Valencia, Spain, March 2024. |
| C65 | L. Tunesi, M. A. Mahdian, V. Curri, A. Carena, M. Nikdast, and P. Bardella, “Segmented Design and Control in Contra-Directional Couplers for Large Bandwidth Tunability,” to appear, in Proc. SPIE Photonics West, San Francisco, CA, January 2024. |
| C64 | R. Kabir, R. G. Kim, and M. Nikdast, “RISA: Round-Robin Intra-Rack Friendly Scheduling Algorithm for Disaggregated Datacenters,” in Proc. ACM International Workshop on Resource Disaggregation in High-Performance Computing (RESDIS’23), collocated with the International Conference for High Performance Computing, Networking, Storage, and Analysis (SC), Denver, CO, November 2023, pp. 1512–1520. |
| C63 | E. Taheri, M. A. Mahdian, S. Pasricha, and M. Nikdast, “TRINE: A Tree-Based Silicon Photonic Interposer Network for Energy-Efficient 2.5D Machine Learning Acceleration,” in Proc. ACM International Workshop on Network on Chip Architectures (NoCArc), collocated with Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Toronto, Canada, October 2023, pp. 15–20. |
| C62 | A. Shafiee, S. Banerjee, B. Charbonnier, S. Pasricha, and M. Nikdast, “Compact and Low-Loss PCM-based Silicon Photonic MZIs for Photonic Neural Networks,” to appear in Proc. IEEE Photonics Conference (IPC), Orlando, FL, November 2023. |
| C61 | Z. Ghanaatian, A. Shafiee, and M. Nikdast, “Variation-Aware Layout and Design Optimization of Silicon Photonic Mach–Zehnder Interferometers,” to appear in Proc. IEEE Photonics Conference (IPC), Orlando, FL, November 2023 |
| C60 | M. A. Mahdian, L. Tunesi, P. Bardella, and M. Nikdast, “Bandwidth-Adaptive Single- and Double-Channel Silicon Photonic Contra-Directional Couplers,” to appear in Proc. IEEE Photonics Conference (IPC), Orlando, FL, November 2023 |
| C59 | F. Gohring, M. Nikdast, and G. Nicolescu, “SerIOS: Enhancing Hardware Security in Integrated Optoelectronic Systems,” to appear in Proc. IEEE International Workshop on Rapid System Prototyping (RSP), Embedded Systems Week (ESWEEK) Conference, Hamburg, Germany, September 2023. |
| C58 | M. A. Mahdian, E. Taheri, and M. Nikdast, “PARS: A Power-Aware and Reliable Control Plane for Silicon Photonic Switch Fabrics,” to appear in Proc. IEEE/Optica Photonics in Switching and Computing (PSC) Conference, Mantova, Italy, September 2023. |
| C57 | S. Afifi, F. Sunny, A. Shaifee, M. Nikdast, and S. Pasricha, “GHOST: A Graph Neural Network Accelerator using Silicon Photonics,” to appear in Proc. International Conference On Compilers, Architectures, And Synthesis For Embedded Systems (CASES), Embedded Systems Week (ESWEEK) Conference, Hamburg, Germany, October 2023. |
| C56 | A. Shafiee, B. Charbonnier, S. Pasricha, and M. Nikdast, “Multiphysics Simulation Approach for Photonic Devices Integrating Phase Change Materials,” to appear in Proc. IEEE International Conference on Numerical Simulation of Optoelectronic Devices (NUSOD), Turin, Italy, September 2023. |
| C55 | L. Tunesi, M. A. Mahdian, V. Curri, A. Carena, M. Nikdast, and P. Bardella, “Thermal Control Scheme in Contra-Directional Couplers for Centered Tunable Bandwidths,” to appear in Proc. IEEE International Conference on Numerical Simulation of Optoelectronic Devices (NUSOD), Turin, Italy, September 2023. |
| C54 | F. Gohring, M. Nikdast, and G. Nicolescu, “Integrated Photonic AI Accelerators under Hardware Security Attacks: Impacts and Countermeasures,” to appear in Proc. IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Phoenix, AZ, July 2023. |
| C53 | F. Sunny, M. Nikdast, and S. Pasricha, “Cross-Layer Design for AI Acceleration with Non-Coherent Optical Computing,” to appear in Proc. ACM Great Lakes Symposium on VLSI (GLSVLSI), Knoxville, TN, June 2023. |
| C52 | A. Shafiee, B. Charbonnier, S. Pasricha, and M. Nikdast, “Design Space Exploration for PCM-based Photonic Memory,” to appear in Proc. ACM Great Lakes Symposium on VLSI (GLSVLSI), Knoxville, TN, June 2023. |
| C51 | S. Afifi, F. Sunny, M. Nikdast, and S. Pasricha, “Transformer Neural Network Acceleration with Non-Coherent Silicon Photonics,” to appear in Proc. ACM Great Lakes Symposium on VLSI (GLSVLSI), Knoxville, TN, June 2023. |
| C50 | F. Sunny, E. Taheri, M. Nikdast, and S. Pasricha, “Machine Learning Accelerators in 2.5D Chiplet Platforms with Silicon Photonics,” to appear, in Proc. IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, Antwerp, Belgium, April 2023. |
| C49 | M. Nikdast, S. Pasricha, and K. Chakrabarty, “Silicon photonic neural network accelerators: Opportunities and challenges,” to appear in Proc. IEEE/Optia Conference on Lasers and Electro-Optics (CLEO), San Jose, CA, May 2023. (Invited) |
| C48 | E. Taheri, S. Pasricha, and M. Nikdast, “ReSiPI: A reconfigurable silicon-photonic 2.5D chiplet network with PCMs for energy-efficient interposer communication,” IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, CA, October 2022, article no. 24. |
| C47 | S. Banerjee, M. Nikdast, S. Pasricha, and K. Chakrabarty, “Pruning coherent integrated photonic neural networks using the lottery ticket hypothesis,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Paphos, Cyprus, July 2022, pp. 128–133. |
| C46 | F. Sunny, M. Nikdast, and S. Pasricha, “RecLight: A recurrent neural network accelerator with integrated silicon photonics,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Paphos, Cyprus, July 2022, pp. 98–103. |
| C45 | A. Shafiee, S. Banerjee, K. Chakrabarty, S. Pasricha, and M. Nikdast, “LoCI: An analysis of the impact of optical loss and crosstalk noise in integrated silicon-photonic neural networks,” ACM Great Lakes Symposium on VLSI (GVLSI), June 2022, pp. 351-355. |
| C44 | F. Sunny, M. Nikdast, and S. Pasricha, “A silicon photonic accelerator for convolutional neural networks with heterogeneous quantization,” ACM Great Lakes Symposium on VLSI (GVLSI), June 2022, pp. 367-371. |
| C43 | S. Banerjee, M. Nikdast, S. Pasricha, and K. Chakrabarty, “CHAMP: Coherent hardware-aware magnitude pruning of integrated photonic neural networks,” IEEE/OSA Optical Fiber Communication Conference (OFC), San Diego, CA, March 2022, paper M2G.3. |
| C42 | E. Taheri, S. Pasricha, and M. Nikdast, “DeFT: A deadlock-free and fault-tolerant routing algorithm for 2.5D chaplet-based networks,” IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, Antwerp, Belgium, March 2022, pp. 1047-1052. |
| C41 | F. Sunny, S. Pasricha, and M. Nikdast, “SONIC: A Sparse Neural Network Inference Accelerator with Silicon Photonics for Energy-Efficient Deep Learning,” IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), January 2022, pp. 214-219. |
| C40 | F. Gohring, M. Nikdast, F. Hessel, O. Liboiron-Ladouceur, and G. Nicolescu, “HyCo: A low-latency hybrid control plane for optical interconnection networks,” IEEE International Workshop on Rapid System Prototyping (RSP), collocated with ESWEEK, October 2021, pp. 50-56. |
| C39 | A. Shafiee, A. Mirza, F. Sunny, S. Banerjee, K. Chakrabarty, S. Pasricha, and M. Nikdast, “Inexact silicon photonics: From devices to applications,” OSA Photonics in Switching and Computing (PSC) Conference, September 2021, paper M3C.2. (Invited) |
| C38 | F. Sunny, A. Mirza, M. Nikdast, and S. Pasricha, “ROBIN: A robust optical binary neural network accelerator,” IEEE/ACM International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), October 2021. |
| C37 | S. Banerjee, C. Chen, J. Talukdar, S. C. Hung, A. Chaudhuri, M. Nikdast, and K. Chakrabarty, “Towards functionally robust AI accelerators,” IEEE Microelectronics Design and Test Symposium (MDTS), Albany, NY, May 2021, pp. 1-6. |
| C36 | S. Banerjee, M. Nikdast, and K. Chakrabarty, “Optimizing coherent integrated photonic neural networks under random uncertainties,” IEEE/OSA Optical Fiber Communication Conference (OFC), San Francisco, CA, June 2021, paper Th1A.22. |
| C35 | E. Taheri, R. G. Kim, and M. Nikdast, “AdEle: An adaptive congestion-and-energy-aware elevator selection for partially connected 3D NoCs,” IEEE/ACM Design Automation Conference (DAC), San Francisco, CA, December 2021, pp. 67-72. |
| C34 | F. Sunny, A. Mirza, M. Nikdast, and S. Pasricha, “CrossLight: A cross-layer optimized silicon photonic neural network accelerator,” IEEE/ACM Design Automation Conference (DAC), San Francisco, CA, December 2021, pp. 1069-1074. |
| C33 | S. Banerjee, M. Nikdast, and K. Chakrabarty, “Modeling silicon-photonic neural networks under uncertainties,” IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, Grenoble, France, March 2021, pp. 98-101. |
| C32 | A. Mirza, S. Pasricha, and M. Nikdast, “Variation-aware inter-device matching in silicon photonic microring resonator demultiplexers,” IEEE Photonics Conference (IPC), 2020, pp. 1-2. |
C31 |
F. Sunny, A. Mirza, I. Thakkar, S. Pasricha, and M. Nikdast, “LORAX: Loss-aware approximations for energy-efficient silicon photonic networks-on-chip”, ACM Great Lakes Symposium on VLSI (GLSVLSI), September 2020, pp. 235-240. (Best Paper Honorable Mention Award) |
| C30 | A. Mirza, F. Sunny, S. Pasricha, and M. Nikdast, “Silicon photonic microring resonators: Design optimization under fabrication non-uniformity”, IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, Grenoble, France, March 2020, pp. 484-489. |
| C29 | A. Mirza, S. Manafi Avari, E. Taheri, S. Pasricha, and M. Nikdast, “Opportunities for cross-layer design in high-performance computing systems with integrated silicon photonic networks”, IEEE/ACM Design, Automation and Test in Europe (DATE) Conference and Exhibition, Grenoble, France, March 2020, pp. 1622-1627. |
| C28 | T. M. Seng, A. Truppel, M. Li, M. Nikdast, and U. Schlichtmann, “Wavelength-routed optical NoCs: Designs and EDA — state of the art and future directions,” IEEE/ACM International Conference on Computer Aided Design (ICCAD), Westminster, CO, November 2019, pp. 1-6. (Invited) |
| C27 | X. Cao, S. Bhatnagar, M. Nikdast, S. Roy, “Hierarchical polynomial chaos for variation analysis of silicon photonics microresonators,” IEEE Applied Computational Electromagnetics Society (ACES) Symposium, Miami, FL 2019, pp. 1-2. |
| C26 | M. Nikdast, G. Nicolescu, and O. Liboiron-Ladouceur, “Improving microresonator reliability in silicon photonic integrated circuits,” IEEE Optical Interconnect (OI) Conference, Santa Fe, NM 2018, pp. 3-4. |
| C25 |
M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “DeEPeR: Enhancing performance and reliability in chip-scale optical interconnection networks,” ACM Great Lakes Symposium on VLSI (GLSVLSI) Conference, Chicago, IL 2018, pp. 63-68. (Best Paper Award Finalist) |
| C24 | F. Gohring, M. Nikdast, Y. Xiong, F. Hessel, O. Liboiron-Ladouceur, and G. Nicolescu, “Silicon photonic interconnects: minimizing the controller latency,” ACM Great Lakes Symposium on VLSI (GLSVLSI) Conference, Chicago, IL 2018, pp. 323-328. (Invited) |
| C23 | M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “Enabling efficient tolerance analysis in silicon photonic integrated circuits,” Progress in Electromagnetic Research Symposium (PIERS), Shanghai, China, 2016, pp. 783-783. (Invited) |
| C22 | M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “An analytical study of process variations in silicon photonic integrated circuits,” Photonics North (PN), Quebec City, Canada, 2016, pp. 1-2. (Invited) |
C21 |
M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “Modeling fabrication non-uniformity in chip-scale silicon photonic interconnects,” Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, Germany, 2016, pp. 115-120. (Best Paper Award) |
| C20 | M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-Ladouceur, “Photonic integrated circuits: A study on process variations,” Optical Fiber Communications Conference and Exhibition (OFC), Anaheim, USA, 2016, paper W2A.22. |
| C19 |
M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Liboiron-ladouceur, “Silicon Photonic Integrated Circuits under Process Variations,” Asia Communications and Photonics Conference (ACP), Hong Kong, 2015, paper ASu2A.12. (Best Paper Award) |
| C18 | F. Gohring, R. Priti, M. Nikdast, F. Hessel, O. Liboiron-Ladouceur, and G. Nicolescu, “A low-latency centralized controller for MZI-based optical integrated networks,” International Conference on Photonics in Switching (PS), Florence, Italy, 2015, pp. 118-120. |
| C17 | L. H. K. Duong, M. Nikdast, J. Xu, Z. Wang, Y. Thonnart, S. Le Beux, P. Yang, X. Wu, and Zh. Wang, “Coherent crosstalk noise analyses in ring-based optical interconnects,” Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France, 2015, pp. 501-506. |
| C16 | M. Nikdast, L. H. K. Duong, J. Xu, S. Le Beux, X. Wu, Z. Wang, P. Yang, and Y. Ye, “CLAP: a crosstalk and loss analysis platform for optical interconnects,” IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Ferrara, Italy, 2014, pp. 172-173. |
| C15 | Y. Ye, X. Wu, J. Xu, M. Nikdast, Z. Wang, and X. Wang, “System-level analysis of mesh-based hybrid optical-electronic network-on-chip,” IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 2013, pp. 321-324. (Invited) |
| C14 | X. Wang, J. Xu, W. Zhang, X. Wu, Y. Ye, Z. Wang, M. Nikdast, and Zh. Wang, “Active power-gating-induced power/ground noise alleviation using parasitic capacitance of on-chip memories,” Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France, 2013, pp. 1221-1224. |
| C13 | W. Liu, Z. Wang, X. Wu, J. Xu, B. Li, W. Zhang, Y. Ye, Zh. Wang, and M. Nikdast, “A network-on-chip benchmark suite based on real applications,” Workshop on SoCs, Heterogeneous Architectures and Workloads (SHAW-4), Collocated with HPCA, Shenzhen, China, 2013. (Invited) |
| C12 | Y. Ye, X. Wu, J. Xu, W. Zhang, M. Nikdast, and X. Wang, “Holistic comparison of optical routers for chip multiprocessors,” Anti-counterfeiting, Security, and Identification (ASID), Taipei, Taiwan, 2012, pp. 1-5. (Invited) |
| C11 | Y. Ye, J. Xu, X. Wu, W. Zhang, W. Liu, M. Nikdast, X. Wang, Z. Wang, and Zh. Wang, “Thermal analysis for 3D optical network-on-chip based on a novel low-cost 6×6 optical router,” Optical Interconnects Conference (OI), Santa Fe, USA, 2012, pp. 110-111. |
| C10 | Z. Wang, J. Xu, X. Wu, Y. Ye, W. Zhang, W. Liu, M. Nikdast, X. Wang, and Zh. Wang, “A novel low-waveguide-crossing floorplan for fat tree based optical networks-on-chip,” Optical Interconnects Conference (OI), Santa Fe, USA, 2012, pp. 100-101. |
| C9 | Y. Ye, J. Xu, X. Wu, W. Zhang, X. Wang, M. Nikdast, Z. Wang, and W. Liu, “Modeling and analysis of thermal effects in optical networks-on-chip,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Chennai, India, 2011, pp. 254-259. |
| C8 | W. Liu, J. Xu, X. Wu, Y. Ye, X. Wang, W. Zhang, M. Nikdast, and Z. Wang, “A NoC traffic suite based on real applications,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Chennai, India, 2011, pp. 66-71. |
| C7 | W. Liu, J. Xu, X. Wang, Y. Wang, W. Zhang, Y. Ye, X. Wu, M. Nikdast, and Z. Wang, “A hardware-software collaborated method for soft-error tolerant MPSoC,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Chennai, India, 2011, pp. 260-265. |
| C6 | Y. Xie, M. Nikdast, J. Xu, W. Zhang, Q. Li, X. Wu, Y. Ye, W. Liu, and X. Wang, “Crosstalk noise and bit error rate analysis for optical networks-on-chip,” Design Automation Conference (DAC), Anaheim, USA, 2010, pp. 657-660. |
| C5 | X. Wu, Y. Ye, W. Zhang, W. Liu, M. Nikdast, X. Wang, and J. Xu,”UNION: A unified inter/intra-chip optical network for chip multiprocessors,” IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch), Anaheim, USA, 2010, pp. 35-40. |
| C4 | H. Ahmadi and M. Nikdast, “Age-based adaptive routing algorithm for network-on-chip,” Iranian Student Conference in Electrical Engineering (ISCEE), Iran, 2009. |
| C3 | M. Davarpanah, A. Mohamad Shafiee, M. Nikdast, and M. Montazeri, “A predetermined routing algorithm for network-on-chip,” Iranian Conference on Electrical Engineering (ICEE), Iran, 2009. |
| C2 | A. M. Shafiee, M. Nikdast, and M. Montazeri, “Parameterized intermittent routing algorithm in networks-on-chip,” IEEE International Conference on Emerging Trends in Computing (ICETiC), India, 2009. |
| C1 | B. Soleimani, E. Shahabian, M. yavari, and M. Nikdast, “A novel heuristic for solving the 8 puzzle problem based on IDA method,” Iranian Student Conference in Electrical Engineering (ICEE), Iran, 2008. |
Refereed Poster Presentations
| P13 | S. Manafi Avari, R. G. Kim, and M. Nikdast, “Adaptive resource management in photonically interconnected disaggregated datacenters,” IEEE International Conference on Green and Sustainable Computing (IGSC), Alexandria, VA, October 2019. |
| P12 |
M. Pakhale, Y. Chopra, N. Daley, and M. Nikdast, “Eye of Horus (EoH): An automated real-time surveillance system to protect citizens,” Colorado State University Demo Day Forum, Fort Collins, CO, April 2019. (Best Poster; People’s Choice Award) |
| P11 | M. Nikdast, G. Nicolescu, and O. Libiron-Ladouceur, “Fault-tolerant optical NoCs: an approach based on microresonator design space exploration,” Design Automation Conference (DAC) – Late Breaking Results (LBR), San Francisco, CA 2018. |
| P10 | M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Libiron-Ladouceur, “Chip-scale silicon photonic integrated circuits: a study on fabrication non-uniformity,” IEEE/OSA Montreal Networking Event and Poster Competition, Montreal, Canada, 2017. |
| P9 | M. Nikdast, G. Nicolescu, J. Trajkovic, and O. Libiron-Ladouceur, “Silicon photonic interconnects: latest advances and current challenges,” Postdoctoral Research Day, Montreal, Canada, 2015. |
| P8 | M. Nikdast, “Optical Interconnects for Computing Systems: a Formal Study on Signal-to-Noise Ratio,“ Design, Automation and Test in Europe Conference and Exhibition (DATE), France, 2015. (Ph.D. Forum) |
| P7 | M. Nikdast and J. Xu, “On the impact of crosstalk noise in optical networks-on-chip,” Design Automation Conference (DAC), San Francisco, USA, 2014. (Ph.D. Forum, Acceptance rate: 30%) |
| P6 | Z. Wang, J. Xu, X. Wu, X. Wang, Zh. Wang, M. Nikdast, and P. Yang, “Holistic modeling and comparison of inter-chip optical and electrical interconnects,” Design Automation Conference (DAC), San Francisco, USA, 2014. |
| P5 | W. Liu, J. Xu, X. Wu, Y. Ye, X. W., W. Zhang, M. Nikdast, and Z. Wang, “MCSL: a realistic traffic benchmark suite for network-on-chip studies,” Design Automation Conference (DAC), San Diego, USA, 2011. |
| P4 | W. Liu, J. Xu, X. Wang, Y. Wang, W. Zhang, Y. Ye, X. Wu, M. Nikdast, and Z. Wang, “A low-overhead hardware-software collaborated approach for soft-error tolerance,” Design Automation Conference (DAC), San Diego, USA, 2011. |
| P3 |
M. Nikdast, J. Xu, X. Wu, Y. Ye, W. Liu, and X. Wang, “A formal analysis of crosstalk noise in mesh-based optical networks-on-chip for chip multiprocessors,” AMD Technical Forum and Exhibition (AMD-TFE), Taipei, Taiwan, 2010. (Best Project Award, Second place) |
| P2 | W. Liu, X. Wang, J. Xu, X. Wu, Y. Ye, and M. Nikdast, “A case study of on-chip sensor networks for soft-error tolerant multiprocessor systems-on-chip,” AMD Technical Forum and Exhibition (AMD-TFE), Taipei, Taiwan, 2010. (Invited Poster) |
| P1 | M. Nikdast and M. Montazeri, “Analysis of different routing algorithms in NoCs,” Iranian Student Conference in Electrical Engineering (ICEE), Iran, 2008. |
Guest Editorials
| GE3 | D. Bertozzi, J. L. Abellan, and M. Nikdast, “Editorial: Special Issue on Network-on-Chip Again on the Rise: From Emerging Applications to Emerging Technologies,” Micromachines, vol. 12, 2021, 1570. |
| GE2 | E. Fusella, M. Nikdast, I. O’Connor, J. Flich, S. Pasricha, “Guest Editor’s Introduction: Special Issue on Emerging Networks-on-Chip: Designs, Technologies, and Applications,” ACM Journal on Emerging Technologies in Computing Systems (JETC), December 2018. |
| GE1 | M.Nikdast, G. Nicolescu, S. Le Beux, and J. Xu, “Editor’s Introduction: Photonic Interconnects for Computing Systems: Understanding and Pushing Design Challenges,” River Publishers, May 2017, ISBN 9788793519800, pp. 1-8. |
IEEE Potential Articles
| A3 | M. Nikdast, “Research Papers: Writing Tips and Top-Tier Targets,” in IEEE Potentials, vol. 36, no. 3, pp. 26-29, May-June 2017. |
| A2 | M. Nikdast, “Research Tips for Frist-Year Ph.D. Students,” in IEEE Potentials, vol. 35, no. 3, pp. 18-20, May-June 2016. |
| A1 | Sh. Sinha and M. Nikdast, “Finding Happiness and Satisfaction during Your Ph.D. Program,” in IEEE Potentials, vol. 34, no. 3, pp. 36-38, May-June 2015. |
Thesis
| T1 | M. Nikdast, “Signal-to-Noise Ratio in Optical Interconnection Networks: Analysis, Modeling, and Comparison,” Ph.D. Dissertation, The Hong Kong University of Science and Technology (HKUST), Hong Kong, December 2013. |