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ECE Seminar Series


Electrical and Computer Engineering, and Computer Science Special Seminar Sponsored by ISTeC

Title: Roundtable Discussion: Interacting with Federal Funding Agencies
Speaker: Ahmed Louri
Affiliation: University of Arizona
Day: Monday, April 6, 2015
Time: 3:00 pm - 4:00 pm
Location: LSC 372-374

Abstract: Prof. Louri will lead a round table discussion about best practices for interacting with federal funding agencies. He will discuss his experiences as a research grant proposal writer and as a funding agency rotator who helps evaluate proposals, including his recent experience in federal funding management and lessons learned from this. CSU faculty are invited to join in to the conversation with their experiences of what has worked when they have tried to get funding, and what has not. Prof. Louri has led similar round table discussions at other institutions, and they have been very successful.

Bio: Ahmed Louri received the M.S. and Ph.D. degrees in Computer Engineering from the University of Southern California, Los Angeles, in 1984 and 1988, respectively. He joined the University of Arizona in 1988, where he is currently a Professor of Electrical and Computer Engineering and the Director of the High Performance Computing Architectures and Technologies Laboratory. From 2010 to 2013, he served as a Program Director in the Directorate for Computer and Information Science and Engineering (CISE) of the National Science Foundation with an annual research portfolio of $800 million. He managed the core computer architecture program and was on the management team of several cross-cutting programs including Cyber-Physical Systems (CPS), Expeditions in Computing (EIC), Computing Research Infrastructure (CRI), Trustworthy Computing (SaTC), and Failure-Resistant Systems (FRS). His primary research interests include computer architecture, parallel and distributed computing, interconnection networks, optical interconnects for parallel computing systems, reconfigurable computing systems, scalable and power-efficient architectures, fault-tolerant multiprocessors, Network-on-Chip for multi-core architectures, cognitive architectures, emerging interconnect technologies for multicores, embedded and SoC systems. He has published more than 125 journal articles and conference papers in these areas, and holds several US patents. He is a Fellow of IEEE.