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Graduate Exam Abstract


Charles Thangaraj

Ph.D. Preliminary

July 7, 2008, 2.00 to 4.00 pm

Engr. conf. room

Early Design Phase Design Target Trade-Offs Using In-Situ Macro Models


Abstract: Rapid and effective design space exploration at all stages of a design process enables faster design convergence and shorter time-to-market. This is particularly important during the early stage of a design where design decisions can have a significant impact on the design later. Accurate and yet simple design target prediction models based on legacy design data, technology scaling trend, and low level physical design parameters can be iteratively used during early design phase to explore design space for desired design quality and time-to-market requirement. This paper describes a methodology for design space exploration using design target prediction models. These models are driven by legacy deisgn data, technology scaling trends and, an in-situ model-fitting process. Experiments on ISCAS benchmark circuits validate the feasibility of the proposed approach and yielded power centric designs that improved power by 7% - 32% for a corresponding 0% - 4.3% performance impact; performance centric system designs improved performance by 10.31% - 17% for a corresponding 2% - 3.85% power penalty. The results of the prediction model were verified against SPICE on a test circuit and found to be within 13.8% (worst case) of SPICE, sufficient for early design optimizations. Pareto analysis using the proposed method on an industrial 65 nm design uncovered design tradeoffs not obvious to designers. Power centric design improved both system power consumption and performance by 19.6% and 6.3%, respectively; while the performance centric design improved both performance and power by 11.7% and 1.63%, respectively.

Adviser: Dr. Tom Chen
Co-Adviser: NA
Non-ECE Member: Dr. Phillip Chapman, Dept. of Statistics
Member 3: Dr. George Collins
Addional Members: NA

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