Defense Presentation

Charles Thangaraj

Ph.D. Final
November 09, 2009, 4:00 - 6:00 PM
ECE Conf room
"Rapid Design Space Exploration Using Legacy Design Data And Technology Scaling Trend"
Abstract:  Ph.D.Final Exam

Adviser: Dr. Tom Chen
Non-ECE member: Dr. Phillip Chapman
Member3: Dr. George Collins
Member4: Dr. Anthony Maciejewski

Publications:
Journal papers (submitted / published) 1. Thangaraj, C.; Pownall, R.; Nikkel, P.; Yuan, G.; Lear, K.; Chen, T., “Fully CMOS-Compatible On-Chip Optical Clock Distribution & Recovery”, To appear in IEEE Transactions on Very Large Scale Integration Systems. 2. Thangaraj, C.; Alkan, C; Chen, T., “Rapid Design Space Exploration Using Legacy Design Data And Technology Scaling Trend”, Submitted (2nd revison) to Elsevier Integration the VLSI Journal. 3. Pownall, R.; Thangaraj, C.; Nikkel, P.; Yuan, G.; Lear, K.; Chen, T., “CMOS Optoelectronics for Clock Distribution”, Submitted to IEEE/OSA Journal of Lightwave Technology 4. Yuan, G.; Pownall, R.; Nikkel, P.; Thangaraj, C.; Chen, T.; Lear, K., "Characterization of CMOS compatible waveguide-coupled leaky-mode photodetectors," Photonics Technology Letters, IEEE , vol.18, no.15, pp.1657-1659, Aug. 2006 Conference papers 1. Thangaraj, C.; Chen, T., “A Fully CMOS-Compatible Optical H-Tree & Clock Recovery System”, IFIP/IEEE VLSI-SoC 2008 – International Conference on Very Large Scale Integration, October 13-15, 2008. 2. Thangaraj, C.; Chen, T., "Design target exploration for meeting time-to-market using pareto analysis," Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on , pp.364-367, 18-21 May 2008 3. Thangaraj, C.; Chen, T., "Early Design Phase Power Performance Trade-Offs Using In-Situ Macro Models," Electronic Design, Test and Applications, 2008. DELTA 2008. 4th IEEE International Symposium on , pp.539-544, 23-25 Jan. 2008 4. Thangaraj, C.; Chen, T., "Power and Performance Analysis for Early Design Space Exploration," VLSI, 2007. ISVLSI '07. IEEE Computer Society Annual Symposium on, pp.473-478, 9-11 March 2007 5. Thangaraj, C.; Stephenson, K.; Chen, T.; Lear, K.; Raza, A. M., “Design of clock recovery circuits for optical clocking in DSM CMOS”, Proc. SPIE 6590, 65900F (2007), DOI:10.1117/12.721646 6. Yuan, G.; Nikkel, P.; Thangaraj, C.; Chen, T. W.; Pownall, R.; Iguchi, A.; Lear, K. L., "Optical characterization of a leaky-mode polysilicon photodetector using near-field scaning optical microscopy," Lasers and Electro-Optics and 2006 Quantum Electronics and Laser Science Conference. CLEO/QELS 2006. Conference on , pp.1-2, 21-26 May 2006 7. Raza, A.M.; Yuan, G.; Thangaraj, C.; Chen, T.; Lear, K., “Waveguide-coupled CMOS photodetector for on-chip optical interconnects”, Proc. SPIE 5556, 27 (2004), DOI:10.1117/12.559875 8. Raza, A.M.; Guang Wei Yuan; Thangaraj, C.; Chen, T.; Lear, K.L., "Wave


Program of Study:
M510 Linear Program & Network Flows M561 Numerical Analysis I ST511 Dsgn&Data Analys-Resrchers I ST512 Dsgn&Data Analys-Resrchers II EE660 Advanced Topics-VLSI Design EE680 Optimization-Control & Communication CS 530 Fault-Tolerant Computing EE 450 Digital System Design Lab EE 451 Digital System Design EE 534 Analog Integrated Circuit Design EE 535 Analog Integrated Circuit Lab EE 554 Computer Architecture EE 571 VLSI System Design EE 575 Experiments in VLSI System Design