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MicroNet Digital Core Design

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TimeLine  Team Members  Project Summary  Status  Documents Photos  Budget MattsBio   woodward.com xilinx.com     The Digital Core Design Project is in conjunction with Woodward Governor.  The Woodward MicroNet turbine control system uses a VME interface between all of the modules.  Some of the module's designs are running into part obsolescence issues.  The Digital Core Design project will replace the older style circuitry, which is common to all of the MicroNet I/O modules, with a FPGA/processor circuit.  This design will include a Freescale 565 processor with a Xilinx Spartan FPGA interface.  This core design will be the standard for future modules designed. Last Updated: 14-Apr-2008