Please
see Woodward Project 90565 for Report Documentation.
Most of these reports are proprietary information to Woodward;
if you need to see a specific document please contact Matt
Heath so he can give a cleansed version of the report.
Report(s):
ECE401 Presentation
ECE402
Final Report
Project Continuation Document
R001 - Module Technology Matrix (Original
Module Design)
R003 - Marketing Requirments
R004 - 565
& FPGA HyperLynx Simulations
R005 - HDD I/O DPRAM
Memory Map
R006 - MicroNet I/O Module Architecture
R018
- White Box Testing - Digital Core
R019 - White Box Testing
- Discrete Inputs and Outputs
R020 - Four Corners
Testing
R021 - Digital Core Timing Analysis Testing
R021
- Digital Core Signal Integrity Test Plans
R028 - Discrete
Input test Data for Hysterisis
R031 - Master Verification
and Validation Plan
S032 - Design FMEA
S247 -
Requirements Review
