VLSI System Design

EE571 / EE575

Instructor: Tom Chen

Department of Electrical and Computer Engineering
Colorado State University
Fort Collins, CO 80523
Tel: (970) 491-6574
Fax: (970) 491-2249
Email: chen@engr.colostate.edu



  • Lab 6 & 7 reports are due by 8pm on 5th May 2004.


EE571 is a senior level as well as an entry level graduate course on VLSI design. The purpose of this course is to provide students with opportunities to learn and practice the entire process of VLSI chip design. There is a substantial amount of design work associates with the lectures. Students will go through various design stages from behavioral modeling using VHDL or Verilog and their simulation environment, to logic and circuit design, and finally to layout and design verification. All the design activities will be carried out on HP workstations. Up to 10 design labs are scheduled concurrent with the lectures, students are required to submit a design report and to participate in design reviews. Distance learning students should be prepared to come to CSU to complete design work if necessary.

Colorado State University
Department of Electrical Engineering

(c) Copyright 2001