ECE451
Fall 2007
This code implements the 4b
sequence detector described in the Lecture Notes, specifically the FSM with
reduced state diagram on Slide 9-20.
The machine operates on 4 bit
“frames” of data and outputs a 1 when the pattern 0110 or 1010 has
been received.
The patterns must be aligned
to the frame boundaries and must not span two adjacent frames. That is, the
pattern 0011 followed by 0000 will not produce a 1 on the output
The files are
·
FSM (file seq_detector.v)
·
Testbench (file tb_seq_detector.v)
·
Clock generator
for testing (file clk_gen.v)